Loading drivers/clk/qcom/clk-cpu-osm.c +4 −0 Original line number Diff line number Diff line Loading @@ -304,6 +304,7 @@ static struct clk_osm l3_clk = { static DEFINE_CLK_VOTER(l3_cluster0_vote_clk, l3_clk, 0); static DEFINE_CLK_VOTER(l3_cluster1_vote_clk, l3_clk, 0); static DEFINE_CLK_VOTER(l3_misc_vote_clk, l3_clk, 0); static DEFINE_CLK_VOTER(l3_gpu_vote_clk, l3_clk, 0); static struct clk_osm pwrcl_clk = { .cluster_num = 1, Loading Loading @@ -432,6 +433,7 @@ static struct clk_hw *osm_qcom_clk_hws[] = { [L3_CLUSTER0_VOTE_CLK] = &l3_cluster0_vote_clk.hw, [L3_CLUSTER1_VOTE_CLK] = &l3_cluster1_vote_clk.hw, [L3_MISC_VOTE_CLK] = &l3_misc_vote_clk.hw, [L3_GPU_VOTE_CLK] = &l3_gpu_vote_clk.hw, [L3_CLK] = &l3_clk.hw, [CPU0_PWRCL_CLK] = &cpu0_pwrcl_clk.hw, [CPU1_PWRCL_CLK] = &cpu1_pwrcl_clk.hw, Loading Loading @@ -1119,6 +1121,8 @@ static int clk_cpu_osm_driver_probe(struct platform_device *pdev) "clk: Failed to enable cluster1 clock for L3\n"); WARN(clk_prepare_enable(l3_misc_vote_clk.hw.clk), "clk: Failed to enable misc clock for L3\n"); WARN(clk_prepare_enable(l3_gpu_vote_clk.hw.clk), "clk: Failed to enable gpu clock for L3\n"); populate_opp_table(pdev); Loading include/dt-bindings/clock/qcom,cpucc-sm8150.h +1 −0 Original line number Diff line number Diff line Loading @@ -30,5 +30,6 @@ #define CPU7_PERFPCL_CLK 13 #define PERFPCL_CLK 14 #define CPU7_PERFCL_CLK 15 #define L3_GPU_VOTE_CLK 16 #endif Loading
drivers/clk/qcom/clk-cpu-osm.c +4 −0 Original line number Diff line number Diff line Loading @@ -304,6 +304,7 @@ static struct clk_osm l3_clk = { static DEFINE_CLK_VOTER(l3_cluster0_vote_clk, l3_clk, 0); static DEFINE_CLK_VOTER(l3_cluster1_vote_clk, l3_clk, 0); static DEFINE_CLK_VOTER(l3_misc_vote_clk, l3_clk, 0); static DEFINE_CLK_VOTER(l3_gpu_vote_clk, l3_clk, 0); static struct clk_osm pwrcl_clk = { .cluster_num = 1, Loading Loading @@ -432,6 +433,7 @@ static struct clk_hw *osm_qcom_clk_hws[] = { [L3_CLUSTER0_VOTE_CLK] = &l3_cluster0_vote_clk.hw, [L3_CLUSTER1_VOTE_CLK] = &l3_cluster1_vote_clk.hw, [L3_MISC_VOTE_CLK] = &l3_misc_vote_clk.hw, [L3_GPU_VOTE_CLK] = &l3_gpu_vote_clk.hw, [L3_CLK] = &l3_clk.hw, [CPU0_PWRCL_CLK] = &cpu0_pwrcl_clk.hw, [CPU1_PWRCL_CLK] = &cpu1_pwrcl_clk.hw, Loading Loading @@ -1119,6 +1121,8 @@ static int clk_cpu_osm_driver_probe(struct platform_device *pdev) "clk: Failed to enable cluster1 clock for L3\n"); WARN(clk_prepare_enable(l3_misc_vote_clk.hw.clk), "clk: Failed to enable misc clock for L3\n"); WARN(clk_prepare_enable(l3_gpu_vote_clk.hw.clk), "clk: Failed to enable gpu clock for L3\n"); populate_opp_table(pdev); Loading
include/dt-bindings/clock/qcom,cpucc-sm8150.h +1 −0 Original line number Diff line number Diff line Loading @@ -30,5 +30,6 @@ #define CPU7_PERFPCL_CLK 13 #define PERFPCL_CLK 14 #define CPU7_PERFCL_CLK 15 #define L3_GPU_VOTE_CLK 16 #endif