Loading drivers/platform/msm/ipa/ipa_v3/ipa_utils.c +4 −4 Original line number Diff line number Diff line Loading @@ -395,7 +395,7 @@ static const struct rsrc_min_max ipa3_rsrc_src_grp_config [IPA_v4_0_RSRC_GRP_TYPE_SRC_DESCRIPTOR_BUFF] = { {0, 0}, {18, 18}, {0, 0}, {0, 0}, {8, 8}, {0, 0} }, [IPA_v4_0_RSRC_GRP_TYPE_SRC_HPS_DMARS] = { {0, 0}, {0, 63}, {0, 0}, {0, 0}, {0, 63}, {0, 0} }, {0, 63}, {0, 63}, {0, 63}, {0, 63}, {0, 63}, {0, 0} }, [IPA_v4_0_RSRC_GRP_TYPE_SRC_ACK_ENTRIES] = { {0, 0}, {24, 24}, {0, 0}, {0, 0}, {8, 8}, {0, 0} }, }, Loading @@ -408,7 +408,7 @@ static const struct rsrc_min_max ipa3_rsrc_src_grp_config [IPA_v4_0_RSRC_GRP_TYPE_SRC_DESCRIPTOR_BUFF] = { {9, 9}, {14, 14}, {4, 4}, {4, 4}, {0, 0}, {0, 0} }, [IPA_v4_0_RSRC_GRP_TYPE_SRC_HPS_DMARS] = { {0, 63}, {0, 63}, {0, 63}, {0, 63}, {0, 0}, {0, 0} }, {0, 63}, {0, 63}, {0, 63}, {0, 63}, {0, 63}, {0, 0} }, [IPA_v4_0_RSRC_GRP_TYPE_SRC_ACK_ENTRIES] = { {22, 22}, {16, 16}, {6, 6}, {2, 2}, {0, 0}, {0, 0} }, }, Loading Loading @@ -484,9 +484,9 @@ static const struct rsrc_min_max ipa3_rsrc_dst_grp_config [IPA_4_5] = { /* UL/DL/DPL_DST unused unused unused uC N/A */ [IPA_v4_0_RSRC_GRP_TYPE_DST_DATA_SECTORS] = { {16, 16}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0} }, {16, 16}, {5, 5}, {2, 2}, {2, 2}, {0, 0}, {0, 0} }, [IPA_v4_0_RSRC_GRP_TYPE_DST_DPS_DMARS] = { {2, 63}, {0, 0}, {0, 0}, {0, 0}, {0, 2}, {0, 0} }, {2, 63}, {1, 63}, {1, 2}, {1, 2}, {0, 2}, {0, 0} }, }, [IPA_4_5_MHI] = { /* PCIE/DPL DDR DMA/CV2X QDSS uC N/A */ Loading Loading
drivers/platform/msm/ipa/ipa_v3/ipa_utils.c +4 −4 Original line number Diff line number Diff line Loading @@ -395,7 +395,7 @@ static const struct rsrc_min_max ipa3_rsrc_src_grp_config [IPA_v4_0_RSRC_GRP_TYPE_SRC_DESCRIPTOR_BUFF] = { {0, 0}, {18, 18}, {0, 0}, {0, 0}, {8, 8}, {0, 0} }, [IPA_v4_0_RSRC_GRP_TYPE_SRC_HPS_DMARS] = { {0, 0}, {0, 63}, {0, 0}, {0, 0}, {0, 63}, {0, 0} }, {0, 63}, {0, 63}, {0, 63}, {0, 63}, {0, 63}, {0, 0} }, [IPA_v4_0_RSRC_GRP_TYPE_SRC_ACK_ENTRIES] = { {0, 0}, {24, 24}, {0, 0}, {0, 0}, {8, 8}, {0, 0} }, }, Loading @@ -408,7 +408,7 @@ static const struct rsrc_min_max ipa3_rsrc_src_grp_config [IPA_v4_0_RSRC_GRP_TYPE_SRC_DESCRIPTOR_BUFF] = { {9, 9}, {14, 14}, {4, 4}, {4, 4}, {0, 0}, {0, 0} }, [IPA_v4_0_RSRC_GRP_TYPE_SRC_HPS_DMARS] = { {0, 63}, {0, 63}, {0, 63}, {0, 63}, {0, 0}, {0, 0} }, {0, 63}, {0, 63}, {0, 63}, {0, 63}, {0, 63}, {0, 0} }, [IPA_v4_0_RSRC_GRP_TYPE_SRC_ACK_ENTRIES] = { {22, 22}, {16, 16}, {6, 6}, {2, 2}, {0, 0}, {0, 0} }, }, Loading Loading @@ -484,9 +484,9 @@ static const struct rsrc_min_max ipa3_rsrc_dst_grp_config [IPA_4_5] = { /* UL/DL/DPL_DST unused unused unused uC N/A */ [IPA_v4_0_RSRC_GRP_TYPE_DST_DATA_SECTORS] = { {16, 16}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0} }, {16, 16}, {5, 5}, {2, 2}, {2, 2}, {0, 0}, {0, 0} }, [IPA_v4_0_RSRC_GRP_TYPE_DST_DPS_DMARS] = { {2, 63}, {0, 0}, {0, 0}, {0, 0}, {0, 2}, {0, 0} }, {2, 63}, {1, 63}, {1, 2}, {1, 2}, {0, 2}, {0, 0} }, }, [IPA_4_5_MHI] = { /* PCIE/DPL DDR DMA/CV2X QDSS uC N/A */ Loading