Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit daea63ba authored by Prabhanjan Kandula's avatar Prabhanjan Kandula Committed by Gerrit - the friendly Code Review server
Browse files

drm/msm/sde: add CWB custom property support 



If concurrent writeback feature is supported by HW, add a
new property on each CRTC through which client can request
the data point of capture (LM or DSSP output). Availability
of this property on crtc itself is indication for client about
the availability of CWB feature.

Change-Id: Ia6cf3b3f544d8d2f71fc2bcd376081f629e9d8ba
Signed-off-by: default avatarPrabhanjan Kandula <pkandula@codeaurora.org>
parent 65d13472

drivers/gpu/drm/msm/msm_drv.h

+1 −0
Original line number Diff line number Diff line
@@ -161,6 +161,7 @@ enum msm_mdp_crtc_property { 
	CRTC_PROP_SECURITY_LEVEL,

	CRTC_PROP_IDLE_TIMEOUT,

	CRTC_PROP_DEST_SCALER,

	CRTC_PROP_CAPTURE_OUTPUT,



	/* total # of properties */

	CRTC_PROP_COUNT

drivers/gpu/drm/msm/sde/sde_crtc.c

+11 −0
Original line number Diff line number Diff line
@@ -4908,6 +4908,11 @@ static void sde_crtc_install_properties(struct drm_crtc *crtc, 
		{SDE_DRM_SEC_ONLY, "sec_only"},

	};



	static const struct drm_prop_enum_list e_cwb_data_points[] = {

		{CAPTURE_MIXER_OUT, "capture_mixer_out"},

		{CAPTURE_DSPP_OUT, "capture_pp_out"},

	};



	SDE_DEBUG("\n");



	if (!crtc || !catalog) {
@@ -4983,6 +4988,12 @@ static void sde_crtc_install_properties(struct drm_crtc *crtc, 
		"idle_time", 0, 0, U64_MAX, 0,

		CRTC_PROP_IDLE_TIMEOUT);



	if (catalog->has_cwb_support)

		msm_property_install_enum(&sde_crtc->property_info,

				"capture_mode", 0, 0, e_cwb_data_points,

				ARRAY_SIZE(e_cwb_data_points),

				CRTC_PROP_CAPTURE_OUTPUT);



	msm_property_install_blob(&sde_crtc->property_info, "capabilities",

		DRM_MODE_PROP_IMMUTABLE, CRTC_PROP_INFO);

drivers/gpu/drm/msm/sde/sde_crtc.h

+10 −0
Original line number Diff line number Diff line
@@ -48,6 +48,16 @@ enum sde_crtc_client_type { 
	RT_RSC_CLIENT,

};



/**

 * enum sde_crtc_output_capture_point

 * @MIXER_OUT : capture mixer output

 * @DSPP_OUT : capture output of dspp

 */

enum sde_crtc_output_capture_point {

	CAPTURE_MIXER_OUT,

	CAPTURE_DSPP_OUT

};



/**

 * @connectors    : Currently associated drm connectors for retire event

 * @num_connectors: Number of associated drm connectors for retire event

drivers/gpu/drm/msm/sde/sde_hw_catalog.c

+4 −0
Original line number Diff line number Diff line
@@ -1876,6 +1876,9 @@ static int sde_wb_parse_dt(struct device_node *np, struct sde_mdss_cfg *sde_cfg) 
		if (IS_SDE_CTL_REV_100(sde_cfg->ctl_rev))

			set_bit(SDE_WB_INPUT_CTRL, &wb->features);



		if (sde_cfg->has_cwb_support)

			set_bit(SDE_WB_HAS_CWB, &wb->features);



		for (j = 0; j < sde_cfg->mdp_count; j++) {

			sde_cfg->mdp[j].clk_ctrls[wb->clk_ctrl].reg_off =

				PROP_BITVALUE_ACCESS(prop_value,
@@ -3552,6 +3555,7 @@ static int _sde_hardware_pre_caps(struct sde_mdss_cfg *sde_cfg, uint32_t hw_rev) 
		sde_cfg->ts_prefill_rev = 1;

	} else if (IS_SDM845_TARGET(hw_rev)) {

		sde_cfg->has_wb_ubwc = true;

		sde_cfg->has_cwb_support = true;

		sde_cfg->perf.min_prefill_lines = 24;

		sde_cfg->vbif_qos_nlvl = 8;

		sde_cfg->ts_prefill_rev = 2;

drivers/gpu/drm/msm/sde/sde_hw_catalog.h

+4 −0
Original line number Diff line number Diff line
@@ -328,6 +328,7 @@ enum { 
 * @SDE_WB_CDP              Writeback supports client driven prefetch

 * @SDE_WB_INPUT_CTRL       Writeback supports from which pp block input pixel

 *                          data arrives.

 * @SDE_WB_HAS_CWB          Writeback block supports concurrent writeback

 * @SDE_WB_MAX              maximum value

 */

enum {
@@ -347,6 +348,7 @@ enum { 
	SDE_WB_QOS_8LVL,

	SDE_WB_CDP,

	SDE_WB_INPUT_CTRL,

	SDE_WB_HAS_CWB,

	SDE_WB_MAX

};
@@ -1028,6 +1030,7 @@ struct sde_perf_cfg { 
 * @has_src_split      source split feature status

 * @has_cdp            Client driven prefetch feature status

 * @has_wb_ubwc        UBWC feature supported on WB

 * @has_cwb_support    indicates if device supports primary capture through CWB

 * @ubwc_version       UBWC feature version (0x0 for not supported)

 * @ubwc_bw_calc_version indicate how UBWC BW has to be calculated

 * @has_sbuf           indicate if stream buffer is available
@@ -1078,6 +1081,7 @@ struct sde_mdss_cfg { 
	bool has_cdp;

	bool has_dim_layer;

	bool has_wb_ubwc;

	bool has_cwb_support;

	u32 ubwc_version;

	u32 ubwc_bw_calc_version;

	bool has_sbuf;