Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit dac29e6c authored by Joao Pinto's avatar Joao Pinto Committed by Bjorn Helgaas
Browse files

PCI: designware: Add default link up check if sub-driver doesn't override 



Add a default DesignWare "link_up" test for use when a sub-driver doesn't
supply its own pcie_host_ops.link_up() method.

[bhelgaas: changelog, split into its own patch]
Signed-off-by: default avatarJoao Pinto <jpinto@synopsys.com>
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
Acked-by: default avatarPratyush Anand <pratyush.anand@gmail.com>
parent 886bc5ce

drivers/pci/host/pcie-designware.c

+9 −1
Original line number Diff line number Diff line
@@ -70,6 +70,11 @@ 
#define PCIE_ATU_FUNC(x)		(((x) & 0x7) << 16)

#define PCIE_ATU_UPPER_TARGET		0x91C



/* PCIe Port Logic registers */

#define PLR_OFFSET			0x700

#define PCIE_PHY_DEBUG_R1		(PLR_OFFSET + 0x2c)

#define PCIE_PHY_DEBUG_R1_LINK_UP	0x00000010



static struct pci_ops dw_pcie_ops;



int dw_pcie_cfg_read(void __iomem *addr, int size, u32 *val)
@@ -401,10 +406,13 @@ int dw_pcie_wait_for_link(struct pcie_port *pp) 


int dw_pcie_link_up(struct pcie_port *pp)

{

	u32 val;



	if (pp->ops->link_up)

		return pp->ops->link_up(pp);



	return 0;

	val = readl(pp->dbi_base + PCIE_PHY_DEBUG_R1);

	return val & PCIE_PHY_DEBUG_R1_LINK_UP;

}



static int dw_pcie_msi_map(struct irq_domain *domain, unsigned int irq,