Loading arch/arm64/boot/dts/qcom/sm8150.dtsi +3 −0 Original line number Diff line number Diff line Loading @@ -3701,6 +3701,7 @@ qcom,msm-bus,vectors-KBps = <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_CAMERA_CFG 0 0>, <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_CAMERA_CFG 0 1>; qcom,support-hw-trigger; status = "ok"; }; Loading @@ -3715,6 +3716,7 @@ qcom,msm-bus,vectors-KBps = <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_CAMERA_CFG 0 0>, <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_CAMERA_CFG 0 1>; qcom,support-hw-trigger; status = "ok"; }; Loading @@ -3729,6 +3731,7 @@ qcom,msm-bus,vectors-KBps = <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_CAMERA_CFG 0 0>, <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_CAMERA_CFG 0 1>; qcom,support-hw-trigger; status = "ok"; }; Loading drivers/media/platform/msm/camera/cam_cdm/cam_cdm_util.c +175 −1 Original line number Diff line number Diff line Loading @@ -22,6 +22,14 @@ #define CAM_CDM_DWORD 4 #define CAM_CDM_SW_CMD_COUNT 2 #define CAM_CMD_LENGTH_MASK 0xFFFF #define CAM_CDM_COMMAND_OFFSET 24 #define CAM_CDM_REG_OFFSET_MASK 0x00FFFFFF #define CAM_CDM_DMI_DATA_HI_OFFSET 8 #define CAM_CDM_DMI_DATA_LO_OFFSET 12 static unsigned int CDMCmdHeaderSizes[ CAM_CDM_CMD_PRIVATE_BASE + CAM_CDM_SW_CMD_COUNT] = { 0, /* UNUSED*/ Loading @@ -33,7 +41,7 @@ static unsigned int CDMCmdHeaderSizes[ 2, /* GenerateIRQ*/ 3, /* WaitForEvent*/ 1, /* ChangeBase*/ 1, /* PERF_CONTINUOUSROL*/ 1, /* PERF_CONTROL*/ 3, /* DMI32*/ 3, /* DMI64*/ }; Loading Loading @@ -540,3 +548,169 @@ int cam_cdm_util_cmd_buf_write(void __iomem **current_device_base, return ret; } static long cam_cdm_util_dump_dmi_cmd(uint32_t *cmd_buf_addr) { long ret = 0; ret += CDMCmdHeaderSizes[CAM_CDM_CMD_DMI]; CAM_INFO(CAM_CDM, "DMI"); return ret; } static long cam_cdm_util_dump_buff_indirect(uint32_t *cmd_buf_addr) { long ret = 0; ret += CDMCmdHeaderSizes[CAM_CDM_CMD_BUFF_INDIRECT]; CAM_INFO(CAM_CDM, "Buff Indirect"); return ret; } static long cam_cdm_util_dump_reg_cont_cmd(uint32_t *cmd_buf_addr) { long ret = 0; struct cdm_regcontinuous_cmd *p_regcont_cmd; uint32_t *temp_ptr = cmd_buf_addr; int i = 0; p_regcont_cmd = (struct cdm_regcontinuous_cmd *)temp_ptr; temp_ptr += CDMCmdHeaderSizes[CAM_CDM_CMD_REG_CONT]; ret += CDMCmdHeaderSizes[CAM_CDM_CMD_REG_CONT]; CAM_INFO(CAM_CDM, "REG_CONT: COUNT: %u OFFSET: 0x%X", p_regcont_cmd->count, p_regcont_cmd->offset); for (i = 0; i < p_regcont_cmd->count; i++) { CAM_INFO(CAM_CDM, "DATA_%d: 0x%X", i, *temp_ptr); temp_ptr++; ret++; } return ret; } static long cam_cdm_util_dump_reg_random_cmd(uint32_t *cmd_buf_addr) { struct cdm_regrandom_cmd *p_regrand_cmd; uint32_t *temp_ptr = cmd_buf_addr; long ret = 0; int i = 0; p_regrand_cmd = (struct cdm_regrandom_cmd *)temp_ptr; temp_ptr += CDMCmdHeaderSizes[CAM_CDM_CMD_REG_RANDOM]; ret += CDMCmdHeaderSizes[CAM_CDM_CMD_REG_RANDOM]; CAM_INFO(CAM_CDM, "REG_RAND: COUNT: %u", p_regrand_cmd->count); for (i = 0; i < p_regrand_cmd->count; i++) { CAM_INFO(CAM_CDM, "OFFSET_%d: 0x%X DATA_%d: 0x%X", i, *temp_ptr & CAM_CDM_REG_OFFSET_MASK, i, *(temp_ptr + 1)); temp_ptr += 2; ret += 2; } return ret; } static long cam_cdm_util_dump_gen_irq_cmd(uint32_t *cmd_buf_addr) { long ret = 0; ret += CDMCmdHeaderSizes[CAM_CDM_CMD_GEN_IRQ]; CAM_INFO(CAM_CDM, "GEN_IRQ"); return ret; } static long cam_cdm_util_dump_wait_event_cmd(uint32_t *cmd_buf_addr) { long ret = 0; ret += CDMCmdHeaderSizes[CAM_CDM_CMD_WAIT_EVENT]; CAM_INFO(CAM_CDM, "WAIT_EVENT"); return ret; } static long cam_cdm_util_dump_change_base_cmd(uint32_t *cmd_buf_addr) { long ret = 0; struct cdm_changebase_cmd *p_cbase_cmd; uint32_t *temp_ptr = cmd_buf_addr; p_cbase_cmd = (struct cdm_changebase_cmd *)temp_ptr; ret += CDMCmdHeaderSizes[CAM_CDM_CMD_CHANGE_BASE]; CAM_INFO(CAM_CDM, "CHANGE_BASE: 0x%X", p_cbase_cmd->base); return ret; } static long cam_cdm_util_dump_perf_ctrl_cmd(uint32_t *cmd_buf_addr) { long ret = 0; ret += CDMCmdHeaderSizes[CAM_CDM_CMD_PERF_CTRL]; CAM_INFO(CAM_CDM, "PERF_CTRL"); return ret; } void cam_cdm_util_dump_cmd_buf( uint32_t *cmd_buf_start, uint32_t *cmd_buf_end) { uint32_t *buf_now = cmd_buf_start; uint32_t cmd = 0; if (!cmd_buf_start || !cmd_buf_end) { CAM_INFO(CAM_CDM, "Invalid args"); return; } do { cmd = *buf_now; cmd = cmd >> CAM_CDM_COMMAND_OFFSET; switch (cmd) { case CAM_CDM_CMD_DMI: case CAM_CDM_CMD_DMI_32: case CAM_CDM_CMD_DMI_64: buf_now += cam_cdm_util_dump_dmi_cmd(buf_now); break; case CAM_CDM_CMD_REG_CONT: buf_now += cam_cdm_util_dump_reg_cont_cmd(buf_now); break; case CAM_CDM_CMD_REG_RANDOM: buf_now += cam_cdm_util_dump_reg_random_cmd(buf_now); break; case CAM_CDM_CMD_BUFF_INDIRECT: buf_now += cam_cdm_util_dump_buff_indirect(buf_now); break; case CAM_CDM_CMD_GEN_IRQ: buf_now += cam_cdm_util_dump_gen_irq_cmd(buf_now); break; case CAM_CDM_CMD_WAIT_EVENT: buf_now += cam_cdm_util_dump_wait_event_cmd(buf_now); break; case CAM_CDM_CMD_CHANGE_BASE: buf_now += cam_cdm_util_dump_change_base_cmd(buf_now); break; case CAM_CDM_CMD_PERF_CTRL: buf_now += cam_cdm_util_dump_perf_ctrl_cmd(buf_now); break; default: CAM_INFO(CAM_CDM, "Invalid CMD: 0x%x buf 0x%x", cmd, *buf_now); buf_now++; break; } } while (buf_now <= cmd_buf_end); } drivers/media/platform/msm/camera/cam_cdm/cam_cdm_util.h +14 −7 Original line number Diff line number Diff line Loading @@ -13,13 +13,6 @@ #ifndef _CAM_CDM_UTIL_H_ #define _CAM_CDM_UTIL_H_ #define CAM_CDM_SW_CMD_COUNT 2 #define CAM_CMD_LENGTH_MASK 0xFFFF #define CAM_CDM_COMMAND_OFFSET 24 #define CAM_CDM_DMI_DATA_HI_OFFSET 8 #define CAM_CDM_DMI_DATA_LO_OFFSET 12 enum cam_cdm_command { CAM_CDM_CMD_UNUSED = 0x0, CAM_CDM_CMD_DMI = 0x1, Loading Loading @@ -158,4 +151,18 @@ void (*cdm_write_genirq)( uint32_t userdata); }; /** * cam_cdm_util_log_cmd_bufs() * * @brief: Util function to log cdm command buffers * * @cmd_buffer_start: Pointer to start of cmd buffer * @cmd_buffer_end: Pointer to end of cmd buffer * */ void cam_cdm_util_dump_cmd_buf( uint32_t *cmd_buffer_start, uint32_t *cmd_buffer_end); #endif /* _CAM_CDM_UTIL_H_ */ drivers/media/platform/msm/camera/cam_cpas/cam_cpas_hw.c +16 −17 Original line number Diff line number Diff line Loading @@ -523,7 +523,6 @@ static int cam_cpas_hw_reg_read(struct cam_hw_info *cpas_hw, if (!CAM_CPAS_CLIENT_VALID(client_indx)) return -EINVAL; mutex_lock(&cpas_hw->hw_mutex); mutex_lock(&cpas_core->client_mutex[client_indx]); cpas_client = cpas_core->cpas_client[client_indx]; Loading @@ -546,7 +545,6 @@ static int cam_cpas_hw_reg_read(struct cam_hw_info *cpas_hw, unlock_client: mutex_unlock(&cpas_core->client_mutex[client_indx]); mutex_unlock(&cpas_hw->hw_mutex); return rc; } Loading Loading @@ -661,9 +659,6 @@ static int cam_cpas_util_apply_client_axi_vote( axi_port->consolidated_axi_vote.compressed_bw = mnoc_bw; axi_port->consolidated_axi_vote.uncompressed_bw = camnoc_bw; axi_port->consolidated_axi_vote.compressed_bw = mnoc_bw; axi_port->consolidated_axi_vote.uncompressed_bw = camnoc_bw; CAM_DBG(CAM_CPAS, "axi[(%d, %d),(%d, %d)] : camnoc_bw[%llu], mnoc_bw[%llu]", axi_port->mnoc_bus.src, axi_port->mnoc_bus.dst, Loading Loading @@ -698,14 +693,6 @@ static int cam_cpas_util_apply_client_axi_vote( return rc; mutex_unlock(&axi_port->lock); rc = cam_cpas_util_set_camnoc_axi_clk_rate(cpas_hw); if (rc) CAM_ERR(CAM_CPAS, "Failed in setting axi clk rate rc=%d", rc); return rc; unlock_axi_port: mutex_unlock(&axi_port->lock); return rc; Loading Loading @@ -925,6 +912,7 @@ static int cam_cpas_hw_update_ahb_vote(struct cam_hw_info *cpas_hw, unlock_client: mutex_unlock(&cpas_core->client_mutex[client_indx]); mutex_unlock(&cpas_hw->hw_mutex); return rc; } Loading Loading @@ -1226,17 +1214,26 @@ static int cam_cpas_hw_register_client(struct cam_hw_info *cpas_hw, rc = cam_common_util_get_string_index(soc_private->client_name, soc_private->num_clients, client_name, &client_indx); mutex_lock(&cpas_core->client_mutex[client_indx]); if (rc || !CAM_CPAS_CLIENT_VALID(client_indx) || CAM_CPAS_CLIENT_REGISTERED(cpas_core, client_indx)) { CAM_ERR(CAM_CPAS, "Invalid Client register : %s %d, %d", CAM_ERR(CAM_CPAS, "Inval client %s %d : %d %d %pK %d", register_params->identifier, register_params->cell_index, client_indx); register_params->cell_index, CAM_CPAS_CLIENT_VALID(client_indx), CAM_CPAS_CLIENT_REGISTERED(cpas_core, client_indx), cpas_core->cpas_client[client_indx], rc); mutex_unlock(&cpas_core->client_mutex[client_indx]); mutex_unlock(&cpas_hw->hw_mutex); return -EPERM; } cpas_client = kzalloc(sizeof(struct cam_cpas_client), GFP_KERNEL); if (!cpas_client) { mutex_unlock(&cpas_core->client_mutex[client_indx]); mutex_unlock(&cpas_hw->hw_mutex); return -ENOMEM; } Loading @@ -1249,6 +1246,7 @@ static int cam_cpas_hw_register_client(struct cam_hw_info *cpas_hw, client_indx, cpas_client->data.identifier, cpas_client->data.cell_index, rc); kfree(cpas_client); mutex_unlock(&cpas_core->client_mutex[client_indx]); mutex_unlock(&cpas_hw->hw_mutex); return -EINVAL; } Loading @@ -1260,12 +1258,13 @@ static int cam_cpas_hw_register_client(struct cam_hw_info *cpas_hw, cpas_core->cpas_client[client_indx] = cpas_client; cpas_core->registered_clients++; mutex_unlock(&cpas_hw->hw_mutex); CAM_DBG(CAM_CPAS, "client=[%d][%s][%d], registered_clients=%d", client_indx, cpas_client->data.identifier, cpas_client->data.cell_index, cpas_core->registered_clients); mutex_unlock(&cpas_core->client_mutex[client_indx]); mutex_unlock(&cpas_hw->hw_mutex); return 0; } Loading drivers/media/platform/msm/camera/cam_cpas/cam_cpas_intf.c +1 −0 Original line number Diff line number Diff line Loading @@ -619,6 +619,7 @@ static int cam_cpas_dev_remove(struct platform_device *dev) } mutex_lock(&g_cpas_intf->intf_lock); g_cpas_intf->probe_done = false; cam_unregister_subdev(&g_cpas_intf->subdev); cam_cpas_hw_remove(g_cpas_intf->hw_intf); mutex_unlock(&g_cpas_intf->intf_lock); Loading Loading
arch/arm64/boot/dts/qcom/sm8150.dtsi +3 −0 Original line number Diff line number Diff line Loading @@ -3701,6 +3701,7 @@ qcom,msm-bus,vectors-KBps = <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_CAMERA_CFG 0 0>, <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_CAMERA_CFG 0 1>; qcom,support-hw-trigger; status = "ok"; }; Loading @@ -3715,6 +3716,7 @@ qcom,msm-bus,vectors-KBps = <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_CAMERA_CFG 0 0>, <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_CAMERA_CFG 0 1>; qcom,support-hw-trigger; status = "ok"; }; Loading @@ -3729,6 +3731,7 @@ qcom,msm-bus,vectors-KBps = <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_CAMERA_CFG 0 0>, <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_CAMERA_CFG 0 1>; qcom,support-hw-trigger; status = "ok"; }; Loading
drivers/media/platform/msm/camera/cam_cdm/cam_cdm_util.c +175 −1 Original line number Diff line number Diff line Loading @@ -22,6 +22,14 @@ #define CAM_CDM_DWORD 4 #define CAM_CDM_SW_CMD_COUNT 2 #define CAM_CMD_LENGTH_MASK 0xFFFF #define CAM_CDM_COMMAND_OFFSET 24 #define CAM_CDM_REG_OFFSET_MASK 0x00FFFFFF #define CAM_CDM_DMI_DATA_HI_OFFSET 8 #define CAM_CDM_DMI_DATA_LO_OFFSET 12 static unsigned int CDMCmdHeaderSizes[ CAM_CDM_CMD_PRIVATE_BASE + CAM_CDM_SW_CMD_COUNT] = { 0, /* UNUSED*/ Loading @@ -33,7 +41,7 @@ static unsigned int CDMCmdHeaderSizes[ 2, /* GenerateIRQ*/ 3, /* WaitForEvent*/ 1, /* ChangeBase*/ 1, /* PERF_CONTINUOUSROL*/ 1, /* PERF_CONTROL*/ 3, /* DMI32*/ 3, /* DMI64*/ }; Loading Loading @@ -540,3 +548,169 @@ int cam_cdm_util_cmd_buf_write(void __iomem **current_device_base, return ret; } static long cam_cdm_util_dump_dmi_cmd(uint32_t *cmd_buf_addr) { long ret = 0; ret += CDMCmdHeaderSizes[CAM_CDM_CMD_DMI]; CAM_INFO(CAM_CDM, "DMI"); return ret; } static long cam_cdm_util_dump_buff_indirect(uint32_t *cmd_buf_addr) { long ret = 0; ret += CDMCmdHeaderSizes[CAM_CDM_CMD_BUFF_INDIRECT]; CAM_INFO(CAM_CDM, "Buff Indirect"); return ret; } static long cam_cdm_util_dump_reg_cont_cmd(uint32_t *cmd_buf_addr) { long ret = 0; struct cdm_regcontinuous_cmd *p_regcont_cmd; uint32_t *temp_ptr = cmd_buf_addr; int i = 0; p_regcont_cmd = (struct cdm_regcontinuous_cmd *)temp_ptr; temp_ptr += CDMCmdHeaderSizes[CAM_CDM_CMD_REG_CONT]; ret += CDMCmdHeaderSizes[CAM_CDM_CMD_REG_CONT]; CAM_INFO(CAM_CDM, "REG_CONT: COUNT: %u OFFSET: 0x%X", p_regcont_cmd->count, p_regcont_cmd->offset); for (i = 0; i < p_regcont_cmd->count; i++) { CAM_INFO(CAM_CDM, "DATA_%d: 0x%X", i, *temp_ptr); temp_ptr++; ret++; } return ret; } static long cam_cdm_util_dump_reg_random_cmd(uint32_t *cmd_buf_addr) { struct cdm_regrandom_cmd *p_regrand_cmd; uint32_t *temp_ptr = cmd_buf_addr; long ret = 0; int i = 0; p_regrand_cmd = (struct cdm_regrandom_cmd *)temp_ptr; temp_ptr += CDMCmdHeaderSizes[CAM_CDM_CMD_REG_RANDOM]; ret += CDMCmdHeaderSizes[CAM_CDM_CMD_REG_RANDOM]; CAM_INFO(CAM_CDM, "REG_RAND: COUNT: %u", p_regrand_cmd->count); for (i = 0; i < p_regrand_cmd->count; i++) { CAM_INFO(CAM_CDM, "OFFSET_%d: 0x%X DATA_%d: 0x%X", i, *temp_ptr & CAM_CDM_REG_OFFSET_MASK, i, *(temp_ptr + 1)); temp_ptr += 2; ret += 2; } return ret; } static long cam_cdm_util_dump_gen_irq_cmd(uint32_t *cmd_buf_addr) { long ret = 0; ret += CDMCmdHeaderSizes[CAM_CDM_CMD_GEN_IRQ]; CAM_INFO(CAM_CDM, "GEN_IRQ"); return ret; } static long cam_cdm_util_dump_wait_event_cmd(uint32_t *cmd_buf_addr) { long ret = 0; ret += CDMCmdHeaderSizes[CAM_CDM_CMD_WAIT_EVENT]; CAM_INFO(CAM_CDM, "WAIT_EVENT"); return ret; } static long cam_cdm_util_dump_change_base_cmd(uint32_t *cmd_buf_addr) { long ret = 0; struct cdm_changebase_cmd *p_cbase_cmd; uint32_t *temp_ptr = cmd_buf_addr; p_cbase_cmd = (struct cdm_changebase_cmd *)temp_ptr; ret += CDMCmdHeaderSizes[CAM_CDM_CMD_CHANGE_BASE]; CAM_INFO(CAM_CDM, "CHANGE_BASE: 0x%X", p_cbase_cmd->base); return ret; } static long cam_cdm_util_dump_perf_ctrl_cmd(uint32_t *cmd_buf_addr) { long ret = 0; ret += CDMCmdHeaderSizes[CAM_CDM_CMD_PERF_CTRL]; CAM_INFO(CAM_CDM, "PERF_CTRL"); return ret; } void cam_cdm_util_dump_cmd_buf( uint32_t *cmd_buf_start, uint32_t *cmd_buf_end) { uint32_t *buf_now = cmd_buf_start; uint32_t cmd = 0; if (!cmd_buf_start || !cmd_buf_end) { CAM_INFO(CAM_CDM, "Invalid args"); return; } do { cmd = *buf_now; cmd = cmd >> CAM_CDM_COMMAND_OFFSET; switch (cmd) { case CAM_CDM_CMD_DMI: case CAM_CDM_CMD_DMI_32: case CAM_CDM_CMD_DMI_64: buf_now += cam_cdm_util_dump_dmi_cmd(buf_now); break; case CAM_CDM_CMD_REG_CONT: buf_now += cam_cdm_util_dump_reg_cont_cmd(buf_now); break; case CAM_CDM_CMD_REG_RANDOM: buf_now += cam_cdm_util_dump_reg_random_cmd(buf_now); break; case CAM_CDM_CMD_BUFF_INDIRECT: buf_now += cam_cdm_util_dump_buff_indirect(buf_now); break; case CAM_CDM_CMD_GEN_IRQ: buf_now += cam_cdm_util_dump_gen_irq_cmd(buf_now); break; case CAM_CDM_CMD_WAIT_EVENT: buf_now += cam_cdm_util_dump_wait_event_cmd(buf_now); break; case CAM_CDM_CMD_CHANGE_BASE: buf_now += cam_cdm_util_dump_change_base_cmd(buf_now); break; case CAM_CDM_CMD_PERF_CTRL: buf_now += cam_cdm_util_dump_perf_ctrl_cmd(buf_now); break; default: CAM_INFO(CAM_CDM, "Invalid CMD: 0x%x buf 0x%x", cmd, *buf_now); buf_now++; break; } } while (buf_now <= cmd_buf_end); }
drivers/media/platform/msm/camera/cam_cdm/cam_cdm_util.h +14 −7 Original line number Diff line number Diff line Loading @@ -13,13 +13,6 @@ #ifndef _CAM_CDM_UTIL_H_ #define _CAM_CDM_UTIL_H_ #define CAM_CDM_SW_CMD_COUNT 2 #define CAM_CMD_LENGTH_MASK 0xFFFF #define CAM_CDM_COMMAND_OFFSET 24 #define CAM_CDM_DMI_DATA_HI_OFFSET 8 #define CAM_CDM_DMI_DATA_LO_OFFSET 12 enum cam_cdm_command { CAM_CDM_CMD_UNUSED = 0x0, CAM_CDM_CMD_DMI = 0x1, Loading Loading @@ -158,4 +151,18 @@ void (*cdm_write_genirq)( uint32_t userdata); }; /** * cam_cdm_util_log_cmd_bufs() * * @brief: Util function to log cdm command buffers * * @cmd_buffer_start: Pointer to start of cmd buffer * @cmd_buffer_end: Pointer to end of cmd buffer * */ void cam_cdm_util_dump_cmd_buf( uint32_t *cmd_buffer_start, uint32_t *cmd_buffer_end); #endif /* _CAM_CDM_UTIL_H_ */
drivers/media/platform/msm/camera/cam_cpas/cam_cpas_hw.c +16 −17 Original line number Diff line number Diff line Loading @@ -523,7 +523,6 @@ static int cam_cpas_hw_reg_read(struct cam_hw_info *cpas_hw, if (!CAM_CPAS_CLIENT_VALID(client_indx)) return -EINVAL; mutex_lock(&cpas_hw->hw_mutex); mutex_lock(&cpas_core->client_mutex[client_indx]); cpas_client = cpas_core->cpas_client[client_indx]; Loading @@ -546,7 +545,6 @@ static int cam_cpas_hw_reg_read(struct cam_hw_info *cpas_hw, unlock_client: mutex_unlock(&cpas_core->client_mutex[client_indx]); mutex_unlock(&cpas_hw->hw_mutex); return rc; } Loading Loading @@ -661,9 +659,6 @@ static int cam_cpas_util_apply_client_axi_vote( axi_port->consolidated_axi_vote.compressed_bw = mnoc_bw; axi_port->consolidated_axi_vote.uncompressed_bw = camnoc_bw; axi_port->consolidated_axi_vote.compressed_bw = mnoc_bw; axi_port->consolidated_axi_vote.uncompressed_bw = camnoc_bw; CAM_DBG(CAM_CPAS, "axi[(%d, %d),(%d, %d)] : camnoc_bw[%llu], mnoc_bw[%llu]", axi_port->mnoc_bus.src, axi_port->mnoc_bus.dst, Loading Loading @@ -698,14 +693,6 @@ static int cam_cpas_util_apply_client_axi_vote( return rc; mutex_unlock(&axi_port->lock); rc = cam_cpas_util_set_camnoc_axi_clk_rate(cpas_hw); if (rc) CAM_ERR(CAM_CPAS, "Failed in setting axi clk rate rc=%d", rc); return rc; unlock_axi_port: mutex_unlock(&axi_port->lock); return rc; Loading Loading @@ -925,6 +912,7 @@ static int cam_cpas_hw_update_ahb_vote(struct cam_hw_info *cpas_hw, unlock_client: mutex_unlock(&cpas_core->client_mutex[client_indx]); mutex_unlock(&cpas_hw->hw_mutex); return rc; } Loading Loading @@ -1226,17 +1214,26 @@ static int cam_cpas_hw_register_client(struct cam_hw_info *cpas_hw, rc = cam_common_util_get_string_index(soc_private->client_name, soc_private->num_clients, client_name, &client_indx); mutex_lock(&cpas_core->client_mutex[client_indx]); if (rc || !CAM_CPAS_CLIENT_VALID(client_indx) || CAM_CPAS_CLIENT_REGISTERED(cpas_core, client_indx)) { CAM_ERR(CAM_CPAS, "Invalid Client register : %s %d, %d", CAM_ERR(CAM_CPAS, "Inval client %s %d : %d %d %pK %d", register_params->identifier, register_params->cell_index, client_indx); register_params->cell_index, CAM_CPAS_CLIENT_VALID(client_indx), CAM_CPAS_CLIENT_REGISTERED(cpas_core, client_indx), cpas_core->cpas_client[client_indx], rc); mutex_unlock(&cpas_core->client_mutex[client_indx]); mutex_unlock(&cpas_hw->hw_mutex); return -EPERM; } cpas_client = kzalloc(sizeof(struct cam_cpas_client), GFP_KERNEL); if (!cpas_client) { mutex_unlock(&cpas_core->client_mutex[client_indx]); mutex_unlock(&cpas_hw->hw_mutex); return -ENOMEM; } Loading @@ -1249,6 +1246,7 @@ static int cam_cpas_hw_register_client(struct cam_hw_info *cpas_hw, client_indx, cpas_client->data.identifier, cpas_client->data.cell_index, rc); kfree(cpas_client); mutex_unlock(&cpas_core->client_mutex[client_indx]); mutex_unlock(&cpas_hw->hw_mutex); return -EINVAL; } Loading @@ -1260,12 +1258,13 @@ static int cam_cpas_hw_register_client(struct cam_hw_info *cpas_hw, cpas_core->cpas_client[client_indx] = cpas_client; cpas_core->registered_clients++; mutex_unlock(&cpas_hw->hw_mutex); CAM_DBG(CAM_CPAS, "client=[%d][%s][%d], registered_clients=%d", client_indx, cpas_client->data.identifier, cpas_client->data.cell_index, cpas_core->registered_clients); mutex_unlock(&cpas_core->client_mutex[client_indx]); mutex_unlock(&cpas_hw->hw_mutex); return 0; } Loading
drivers/media/platform/msm/camera/cam_cpas/cam_cpas_intf.c +1 −0 Original line number Diff line number Diff line Loading @@ -619,6 +619,7 @@ static int cam_cpas_dev_remove(struct platform_device *dev) } mutex_lock(&g_cpas_intf->intf_lock); g_cpas_intf->probe_done = false; cam_unregister_subdev(&g_cpas_intf->subdev); cam_cpas_hw_remove(g_cpas_intf->hw_intf); mutex_unlock(&g_cpas_intf->intf_lock); Loading