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Commit d9c4115f authored by H Hartley Sweeten's avatar H Hartley Sweeten Committed by Greg Kroah-Hartman
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staging: comedi: ni_stc.h: tidy up G_Save_Register 



Rename the CamelCase and define the G0 and G1 registers to add clarity
to the mio_regmap tables.

Signed-off-by: default avatarH Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: default avatarIan Abbott <abbotti@mev.co.uk>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 27650d99

drivers/staging/comedi/drivers/ni_mio_common.c

+4 −4
Original line number Diff line number Diff line
@@ -418,8 +418,8 @@ static const struct mio_regmap m_series_stc_read_regmap[] = { 
	[NISTC_DIO_IN_REG]		= { 0, 0 }, /* Unknown */

	[NISTC_G0_HW_SAVE_REG]		= { 0x110, 4 },

	[NISTC_G1_HW_SAVE_REG]		= { 0x114, 4 },

	[G_Save_Register(0)]		= { 0x118, 4 },

	[G_Save_Register(1)]		= { 0x11c, 4 },

	[NISTC_G0_SAVE_REG]		= { 0x118, 4 },

	[NISTC_G1_SAVE_REG]		= { 0x11c, 4 },

	[AO_UI_Save_Registers]		= { 0x120, 4 },

	[AO_BC_Save_Registers]		= { 0x124, 4 },

	[AO_UC_Save_Registers]		= { 0x128, 4 },
@@ -3708,8 +3708,8 @@ static const struct mio_regmap ni_gpct_to_stc_regmap[] = { 
	[NITIO_G1_CMD]		= { NISTC_G1_CMD_REG, 2 },

	[NITIO_G0_HW_SAVE]	= { NISTC_G0_HW_SAVE_REG, 4 },

	[NITIO_G1_HW_SAVE]	= { NISTC_G1_HW_SAVE_REG, 4 },

	[NITIO_G0_SW_SAVE]	= { G_Save_Register(0), 4 },

	[NITIO_G1_SW_SAVE]	= { G_Save_Register(1), 4 },

	[NITIO_G0_SW_SAVE]	= { NISTC_G0_SAVE_REG, 4 },

	[NITIO_G1_SW_SAVE]	= { NISTC_G1_SAVE_REG, 4 },

	[NITIO_G0_MODE]		= { NISTC_G0_MODE_REG, 2 },

	[NITIO_G1_MODE]		= { NISTC_G1_MODE_REG, 2 },

	[NITIO_G0_LOADA]	= { NISTC_G0_LOADA_REG, 4 },

drivers/staging/comedi/drivers/ni_stc.h

+3 −4
Original line number Diff line number Diff line
@@ -543,6 +543,9 @@ 
#define NISTC_G0_HW_SAVE_REG		8

#define NISTC_G1_HW_SAVE_REG		10



#define NISTC_G0_SAVE_REG		12

#define NISTC_G1_SAVE_REG		14



#define AI_SI_Save_Registers		64

#define AI_SC_Save_Registers		66
@@ -559,10 +562,6 @@ enum Joint_Status_2_Bits { 
#define AO_BC_Save_Registers		18

#define AO_UC_Save_Registers		20



#define G_Save_Register(a)		(12+(a)*2)

#define G_Save_Register_High(a)		(12+(a)*2)

#define G_Save_Register_Low(a)		(13+(a)*2)



/* command register */

#define G_Disarm_Copy			_bit15	/* strobe */

#define G_Save_Trace_Copy		_bit14