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Commit d9b79fb5 authored by Ben Dooks's avatar Ben Dooks
Browse files

[ARM] S3C64XX: Add VIC0 and VIC1 sourced interripts



Add and initialise the two VIC (PL192) found on
the S3C64XX series CPUs.

Signed-off-by: default avatarBen Dooks <ben-linux@fluff.org>
parent d626aeed
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+6 −0
Original line number Diff line number Diff line
@@ -58,6 +58,12 @@ void __init s3c6410_init_clocks(int xtal)
	s3c24xx_register_baseclocks(xtal);
}

void __init s3c6410_init_irq(void)
{
	/* VIC0 is missing IRQ7, VIC1 is fully populated. */
	s3c64xx_init_irq(~0 & ~(1 << 7), ~0);
}

struct sysdev_class s3c6410_sysclass = {
	.name	= "s3c6410-core",
};
+1 −0
Original line number Diff line number Diff line
@@ -44,6 +44,7 @@ extern void s3c_init_cpu(unsigned long idcode,
/* core initialisation functions */

extern void s3c24xx_init_irq(void);
extern void s3c64xx_init_irq(u32 vic0, u32 vic1);

extern void s3c24xx_init_io(struct map_desc *mach_desc, int size);

+1 −0
Original line number Diff line number Diff line
@@ -10,6 +10,7 @@ config PLAT_S3C64XX
	bool
	depends on ARCH_S3C64XX
	select PLAT_S3C
	select ARM_VIC
	default y
	select NO_IOPORT
	select ARCH_REQUIRE_GPIOLIB
+1 −0
Original line number Diff line number Diff line
@@ -14,3 +14,4 @@ obj- :=

obj-y				+= dev-uart.o
obj-y				+= cpu.o
obj-y				+= irq.o
+3 −0
Original line number Diff line number Diff line
@@ -24,6 +24,9 @@

#define S3C_IRQ(x)	((x) + S3C_IRQ_OFFSET)

#define S3C_VIC0_BASE	S3C_IRQ(0)
#define S3C_VIC1_BASE	S3C_IRQ(32)

/* UART interrupts, each UART has 4 intterupts per channel so
 * use the space between the ISA and S3C main interrupts. Note, these
 * are not in the same order as the S3C24XX series! */
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