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Commit d89777bf authored by Bruce Allan's avatar Bruce Allan Committed by Jeff Kirsher
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e1000e: add support for IEEE-1588 PTP



Add PTP IEEE-1588 support and make accesible via the PHC subsystem.

v2: make e1000e_ptp_clock_info a static const struct per Stephen Hemminger

Cc: Stephen Hemminger <stephen@networkplumber.org>
Cc: Richard Cochran <richardcochran@gmail.com>
Signed-off-by: default avatarBruce Allan <bruce.w.allan@intel.com>
Reviewed-by: default avatarJacob Keller <Jacob.e.keller@intel.com>
Acked-by: default avatarRichard Cochran <richardcochran@gmail.com>
Tested-by: default avatarJeff Pieper <jeffrey.e.pieper@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
parent 347b5201
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+1 −0
Original line number Diff line number Diff line
@@ -74,6 +74,7 @@ config E1000E
	tristate "Intel(R) PRO/1000 PCI-Express Gigabit Ethernet support"
	depends on PCI && (!SPARC32 || BROKEN)
	select CRC32
	select PTP_1588_CLOCK
	---help---
	  This driver supports the PCI-Express Intel(R) PRO/1000 gigabit
	  ethernet family of adapters. For PCI or PCI-X e1000 adapters,
+1 −1
Original line number Diff line number Diff line
@@ -34,5 +34,5 @@ obj-$(CONFIG_E1000E) += e1000e.o

e1000e-objs := 82571.o ich8lan.o 80003es2lan.o \
	       mac.o manage.o nvm.o phy.o \
	       param.o ethtool.o netdev.o
	       param.o ethtool.o netdev.o ptp.o
+11 −0
Original line number Diff line number Diff line
@@ -544,9 +544,20 @@

#define E1000_TSYNCRXCTL_VALID		0x00000001 /* Rx timestamp valid */
#define E1000_TSYNCRXCTL_TYPE_MASK	0x0000000E /* Rx type mask */
#define E1000_TSYNCRXCTL_TYPE_L2_V2	0x00
#define E1000_TSYNCRXCTL_TYPE_L4_V1	0x02
#define E1000_TSYNCRXCTL_TYPE_L2_L4_V2	0x04
#define E1000_TSYNCRXCTL_TYPE_ALL	0x08
#define E1000_TSYNCRXCTL_TYPE_EVENT_V2	0x0A
#define E1000_TSYNCRXCTL_ENABLED	0x00000010 /* enable Rx timestamping */
#define E1000_TSYNCRXCTL_SYSCFI		0x00000020 /* Sys clock frequency */

#define E1000_RXMTRL_PTP_V1_SYNC_MESSAGE	0x00000000
#define E1000_RXMTRL_PTP_V1_DELAY_REQ_MESSAGE	0x00010000

#define E1000_RXMTRL_PTP_V2_SYNC_MESSAGE	0x00000000
#define E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE	0x01000000

#define E1000_TIMINCA_INCPERIOD_SHIFT	24
#define E1000_TIMINCA_INCVALUE_MASK	0x00FFFFFF

+8 −1
Original line number Diff line number Diff line
@@ -43,7 +43,8 @@
#include <linux/if_vlan.h>
#include <linux/clocksource.h>
#include <linux/net_tstamp.h>

#include <linux/ptp_clock_kernel.h>
#include <linux/ptp_classify.h>
#include "hw.h"

struct e1000_info;
@@ -413,6 +414,8 @@ struct e1000_adapter {
	spinlock_t systim_lock;	/* protects SYSTIML/H regsters */
	struct cyclecounter cc;
	struct timecounter tc;
	struct ptp_clock *ptp_clock;
	struct ptp_clock_info ptp_clock_info;
};

struct e1000_info {
@@ -427,6 +430,8 @@ struct e1000_info {
	const struct e1000_nvm_operations *nvm_ops;
};

s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca);

/* The system time is maintained by a 64-bit counter comprised of the 32-bit
 * SYSTIMH and SYSTIML registers.  How the counter increments (and therefore
 * its resolution) is based on the contents of the TIMINCA register - it
@@ -704,6 +709,8 @@ extern s32 e1000_phy_force_speed_duplex_ife(struct e1000_hw *hw);
extern s32 e1000_check_polarity_igp(struct e1000_hw *hw);
extern bool e1000_check_phy_82574(struct e1000_hw *hw);
extern s32 e1000_read_emi_reg_locked(struct e1000_hw *hw, u16 addr, u16 *data);
extern void e1000e_ptp_init(struct e1000_adapter *adapter);
extern void e1000e_ptp_remove(struct e1000_adapter *adapter);

static inline s32 e1000_phy_hw_reset(struct e1000_hw *hw)
{
+12 −0
Original line number Diff line number Diff line
@@ -2209,8 +2209,20 @@ static int e1000e_get_ts_info(struct net_device *netdev,
	info->tx_types = (1 << HWTSTAMP_TX_OFF) | (1 << HWTSTAMP_TX_ON);

	info->rx_filters = ((1 << HWTSTAMP_FILTER_NONE) |
			    (1 << HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
			    (1 << HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
			    (1 << HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |
			    (1 << HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ) |
			    (1 << HWTSTAMP_FILTER_PTP_V2_L2_SYNC) |
			    (1 << HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ) |
			    (1 << HWTSTAMP_FILTER_PTP_V2_EVENT) |
			    (1 << HWTSTAMP_FILTER_PTP_V2_SYNC) |
			    (1 << HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) |
			    (1 << HWTSTAMP_FILTER_ALL));

	if (adapter->ptp_clock)
		info->phc_index = ptp_clock_index(adapter->ptp_clock);

	return 0;
}

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