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Commit d896f9d6 authored by Sudarshan Rajagopalan's avatar Sudarshan Rajagopalan Committed by Gerrit - the friendly Code Review server
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ARM: dts: msm: Enable deep pre-fetch for NPU for sm8150 



Enable context caching with deep pre-fetch of length 4 x 4k
pages for all context banks of NPU for sm8150 v1.

Change-Id: Id9a3e976aff877dde8c6e96458a4ac046fbdf869
Signed-off-by: default avatarSudarshan Rajagopalan <sudaraja@codeaurora.org>
parent 4b3bb01f

arch/arm64/boot/dts/qcom/msm-arm-smmu-sm8150.dtsi

+18 −1
Original line number Diff line number Diff line
@@ -388,6 +388,23 @@ 
};



&kgsl_smmu {

	qcom,actlr = <0x0 0x407 0x303>;

	qcom,actlr =

		/* All CBs of GFX: +15 deep PF */

		<0x0 0x407 0x303>;

};



&apps_smmu {

	qcom,actlr =

		/* SIDs 0x1460 - 0x1463 of NPU: +3 deep PF */

		<0x1460 0x3 0x103>,



		/* SIDs 0x1464 - 0x1465 of NPU: +3 deep PF */

		<0x1464 0x1 0x103>,



		/* SIDs 0x2060 - 0x2063 of NPU: +3 deep PF */

		<0x2060 0x3 0x103>,



		/* SIDs 0x2064 - 0x2065 of NPU: +3 deep PF */

		<0x2064 0x1 0x103>;

};