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Commit d871629b authored by Greg Ungerer's avatar Greg Ungerer Committed by Linus Torvalds
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[PATCH] m68knommu: allow for SDRAM and GPIO differences on 5270/1 and 5274/5 processors 



Allow for differences in the SDRAM controller setup and GPIO pin setup
of the 5270/1 and 5274/5 parts. With separate config options for each
now this no longer needs to be board specific.

Signed-off-by: default avatarGreg Ungerer <gerg@uclinux.com>
Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
parent 2d9d166e

include/asm-m68knommu/m527xsim.h

+19 −2
Original line number Diff line number Diff line
@@ -37,13 +37,14 @@ 
/*

 *	SDRAM configuration registers.

 */

#ifdef CONFIG_M5271EVB

#ifdef CONFIG_M5271

#define	MCFSIM_DCR		0x40		/* SDRAM control */

#define	MCFSIM_DACR0		0x48		/* SDRAM base address 0 */

#define	MCFSIM_DMR0		0x4c		/* SDRAM address mask 0 */

#define	MCFSIM_DACR1		0x50		/* SDRAM base address 1 */

#define	MCFSIM_DMR1		0x54		/* SDRAM address mask 1 */

#else

#endif

#ifdef CONFIG_M5275

#define	MCFSIM_DMR		0x40		/* SDRAM mode */

#define	MCFSIM_DCR		0x44		/* SDRAM control */

#define	MCFSIM_DCFG1		0x48		/* SDRAM configuration 1 */
@@ -54,5 +55,21 @@ 
#define	MCFSIM_DMR1		0x5c		/* SDRAM address mask 1 */

#endif



/*

 *	GPIO pins setups to enable the UARTs.

 */

#ifdef CONFIG_M5271

#define MCF_GPIO_PAR_UART	0x100048	/* PAR UART address */

#define UART0_ENABLE_MASK	0x000f

#define UART1_ENABLE_MASK	0x0ff0

#define UART2_ENABLE_MASK	0x3000

#endif

#ifdef CONFIG_M5275

#define MCF_GPIO_PAR_UART	0x10007c	/* PAR UART address */

#define UART0_ENABLE_MASK	0x000f

#define UART1_ENABLE_MASK	0x00f0

#define UART2_ENABLE_MASK	0x3f00 

#endif



/****************************************************************************/

#endif	/* m527xsim_h */