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Commit d77fe635 authored by Julian Stecklina's avatar Julian Stecklina Committed by Avi Kivity
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KVM: Allow aligned byte and word writes to IOAPIC registers. 



This fixes byte accesses to IOAPIC_REG_SELECT as mandated by at least the
ICH10 and Intel Series 5 chipset specs. It also makes ioapic_mmio_write
consistent with ioapic_mmio_read, which also allows byte and word accesses.

Signed-off-by: default avatarJulian Stecklina <js@alien8.de>
Signed-off-by: default avatarAvi Kivity <avi@redhat.com>
parent 60f9a9ef

virt/kvm/ioapic.c

+12 −3
Original line number Diff line number Diff line
@@ -332,9 +332,18 @@ static int ioapic_mmio_write(struct kvm_io_device *this, gpa_t addr, int len, 
		     (void*)addr, len, val);

	ASSERT(!(addr & 0xf));	/* check alignment */



	if (len == 4 || len == 8)

	switch (len) {

	case 8:

	case 4:

		data = *(u32 *) val;

	else {

		break;

	case 2:

		data = *(u16 *) val;

		break;

	case 1:

		data = *(u8  *) val;

		break;

	default:

		printk(KERN_WARNING "ioapic: Unsupported size %d\n", len);

		return 0;

	}
@@ -343,7 +352,7 @@ static int ioapic_mmio_write(struct kvm_io_device *this, gpa_t addr, int len, 
	spin_lock(&ioapic->lock);

	switch (addr) {

	case IOAPIC_REG_SELECT:

		ioapic->ioregsel = data;

		ioapic->ioregsel = data & 0xFF; /* 8-bit register */

		break;



	case IOAPIC_REG_WINDOW: