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Commit d6d502fa authored by Kukjin Kim's avatar Kukjin Kim Committed by Russell King
Browse files

ARM: 5952/1: ARM: MM: Add ARM_L1_CACHE_SHIFT_6 for handle inside each ARCH Kconfig 



Add ARM_L1_CACHE_SHIFT_6 to arch/arm/Kconfig to allow CPUs with
L1 cache lines which are 64bytes to indicate this without having to
alter the arch/arm/mm/Kconfig entry each time.

Update the mm Kconfig so that ARM_L1_CACHE_SHIFT default value
uses this and change OMAP3 and S5PC1XX to select ARM_L1_CACHE_SHIFT_6.

Acked-by: default avatarBen Dooks <ben-linux@fluff.org>
Acked-by: default avatarTony Lindgren <tony@atomide.com>
Signed-off-by: default avatarKukjin Kim <kgene.kim@samsung.com>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 3b43816f

arch/arm/Kconfig

+6 −0
Original line number Diff line number Diff line
@@ -165,6 +165,11 @@ config ARCH_MTD_XIP 
config GENERIC_HARDIRQS_NO__DO_IRQ

	def_bool y



config ARM_L1_CACHE_SHIFT_6

	bool

	help

	  Setting ARM L1 cache line size to 64 Bytes.



if OPROFILE



config OPROFILE_ARMV6
@@ -642,6 +647,7 @@ config ARCH_S5PC1XX 
	select GENERIC_GPIO

	select HAVE_CLK

	select CPU_V7

	select ARM_L1_CACHE_SHIFT_6

	help

	  Samsung S5PC1XX series based systems

arch/arm/mm/Kconfig

+1 −1
Original line number Diff line number Diff line
@@ -779,5 +779,5 @@ config CACHE_XSC3L2 


config ARM_L1_CACHE_SHIFT

	int

	default 6 if ARCH_OMAP3 || ARCH_S5PC1XX

	default 6 if ARM_L1_CACHE_SHIFT_6

	default 5

arch/arm/plat-omap/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -22,6 +22,7 @@ config ARCH_OMAP3 
	bool "TI OMAP3"

	select CPU_V7

	select COMMON_CLKDEV

	select ARM_L1_CACHE_SHIFT_6



config ARCH_OMAP4

	bool "TI OMAP4"