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Commit d6cf98e0 authored by Paolo Bonzini's avatar Paolo Bonzini
Browse files

Merge branch 'kvm-ppc-next' of... 

Merge branch 'kvm-ppc-next' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc into HEAD

There's nothing much in the way of new features this time; it's mostly
bug fixes, plus Nikunj has implemented support for KVM_CAP_NR_MEMSLOTS.
parents 4d5140c5 70aa3961

arch/powerpc/include/asm/disassemble.h

+5 −0
Original line number Diff line number Diff line
@@ -42,6 +42,11 @@ static inline unsigned int get_dcrn(u32 inst) 
	return ((inst >> 16) & 0x1f) | ((inst >> 6) & 0x3e0);

}



static inline unsigned int get_tmrn(u32 inst)

{

	return ((inst >> 16) & 0x1f) | ((inst >> 6) & 0x3e0);

}



static inline unsigned int get_rt(u32 inst)

{

	return (inst >> 21) & 0x1f;

arch/powerpc/include/asm/reg_booke.h

+6 −0
Original line number Diff line number Diff line
@@ -742,6 +742,12 @@ 
#define MMUBE1_VBE4		0x00000002

#define MMUBE1_VBE5		0x00000001



#define TMRN_TMCFG0      16	/* Thread Management Configuration Register 0 */

#define TMRN_TMCFG0_NPRIBITS       0x003f0000 /* Bits of thread priority */

#define TMRN_TMCFG0_NPRIBITS_SHIFT 16

#define TMRN_TMCFG0_NATHRD         0x00003f00 /* Number of active threads */

#define TMRN_TMCFG0_NATHRD_SHIFT   8

#define TMRN_TMCFG0_NTHRD          0x0000003f /* Number of threads */

#define TMRN_IMSR0	0x120	/* Initial MSR Register 0 (e6500) */

#define TMRN_IMSR1	0x121	/* Initial MSR Register 1 (e6500) */

#define TMRN_INIA0	0x140	/* Next Instruction Address Register 0 */

arch/powerpc/kvm/book3s_64_mmu_hv.c

+2 −1
Original line number Diff line number Diff line
@@ -70,7 +70,8 @@ long kvmppc_alloc_hpt(struct kvm *kvm, u32 *htab_orderp) 
	}



	/* Lastly try successively smaller sizes from the page allocator */

	while (!hpt && order > PPC_MIN_HPT_ORDER) {

	/* Only do this if userspace didn't specify a size via ioctl */

	while (!hpt && order > PPC_MIN_HPT_ORDER && !htab_orderp) {

		hpt = __get_free_pages(GFP_KERNEL|__GFP_ZERO|__GFP_REPEAT|

				       __GFP_NOWARN, order - PAGE_SHIFT);

		if (!hpt)

arch/powerpc/kvm/book3s_hv_rm_mmu.c

+2 −0
Original line number Diff line number Diff line
@@ -470,6 +470,8 @@ long kvmppc_do_h_remove(struct kvm *kvm, unsigned long flags, 
	note_hpte_modification(kvm, rev);

	unlock_hpte(hpte, 0);



	if (v & HPTE_V_ABSENT)

		v = (v & ~HPTE_V_ABSENT) | HPTE_V_VALID;

	hpret[0] = v;

	hpret[1] = r;

	return H_SUCCESS;

arch/powerpc/kvm/book3s_hv_rmhandlers.S

+22 −7
Original line number Diff line number Diff line
@@ -150,6 +150,8 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S) 
	cmpwi	cr1, r12, BOOK3S_INTERRUPT_MACHINE_CHECK

	cmpwi	r12, BOOK3S_INTERRUPT_EXTERNAL

	beq	11f

	cmpwi	r12, BOOK3S_INTERRUPT_H_DOORBELL

	beq 	15f	/* Invoke the H_DOORBELL handler */

	cmpwi	cr2, r12, BOOK3S_INTERRUPT_HMI

	beq	cr2, 14f			/* HMI check */
@@ -174,6 +176,10 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S) 
	mtspr	SPRN_HSRR1, r7

	b	hmi_exception_after_realmode



15:	mtspr SPRN_HSRR0, r8

	mtspr SPRN_HSRR1, r7

	ba    0xe80



kvmppc_primary_no_guest:

	/* We handle this much like a ceded vcpu */

	/* put the HDEC into the DEC, since HDEC interrupts don't wake us */
@@ -2377,7 +2383,6 @@ machine_check_realmode: 
	mr	r3, r9		/* get vcpu pointer */

	bl	kvmppc_realmode_machine_check

	nop

	cmpdi	r3, 0		/* Did we handle MCE ? */

	ld	r9, HSTATE_KVM_VCPU(r13)

	li	r12, BOOK3S_INTERRUPT_MACHINE_CHECK

	/*
@@ -2390,13 +2395,18 @@ machine_check_realmode: 
	 * The old code used to return to host for unhandled errors which

	 * was causing guest to hang with soft lockups inside guest and

	 * makes it difficult to recover guest instance.

	 *

	 * if we receive machine check with MSR(RI=0) then deliver it to

	 * guest as machine check causing guest to crash.

	 */

	ld	r10, VCPU_PC(r9)

	ld	r11, VCPU_MSR(r9)

	andi.	r10, r11, MSR_RI	/* check for unrecoverable exception */

	beq	1f			/* Deliver a machine check to guest */

	ld	r10, VCPU_PC(r9)

	cmpdi	r3, 0		/* Did we handle MCE ? */

	bne	2f	/* Continue guest execution. */

	/* If not, deliver a machine check.  SRR0/1 are already set */

	li	r10, BOOK3S_INTERRUPT_MACHINE_CHECK

	ld	r11, VCPU_MSR(r9)

1:	li	r10, BOOK3S_INTERRUPT_MACHINE_CHECK

	bl	kvmppc_msr_interrupt

2:	b	fast_interrupt_c_return
@@ -2436,14 +2446,19 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S) 


	/* hypervisor doorbell */

3:	li	r12, BOOK3S_INTERRUPT_H_DOORBELL



	/*

	 * Clear the doorbell as we will invoke the handler

	 * explicitly in the guest exit path.

	 */

	lis	r6, (PPC_DBELL_SERVER << (63-36))@h

	PPC_MSGCLR(6)

	/* see if it's a host IPI */

	li	r3, 1

	lbz	r0, HSTATE_HOST_IPI(r13)

	cmpwi	r0, 0

	bnelr

	/* if not, clear it and return -1 */

	lis	r6, (PPC_DBELL_SERVER << (63-36))@h

	PPC_MSGCLR(6)

	/* if not, return -1 */

	li	r3, -1

	blr