Merge "drm/msm/sde: update DS and DSPP HW request based on display type" (d67c9bd8) · Commits · e / devices / android_kernel_oneplus_sm8150

drivers/gpu/drm/msm/sde/sde_connector.c

+1 −0

Original line number	Diff line number	Diff line
		@@ -53,6 +53,7 @@ static const struct drm_prop_enum_list e_topology_control[] = {
		{SDE_RM_TOPCTL_RESERVE_LOCK, "reserve_lock"},
		{SDE_RM_TOPCTL_RESERVE_CLEAR, "reserve_clear"},
		{SDE_RM_TOPCTL_DSPP, "dspp"},
		{SDE_RM_TOPCTL_DS, "ds"},
		};
		static const struct drm_prop_enum_list e_power_mode[] = {
		{SDE_MODE_DPMS_ON, "ON"},

+7 −0

Original line number	Diff line number	Diff line
		@@ -445,6 +445,13 @@ int sde_encoder_in_clone_mode(struct drm_encoder *drm_enc)
		sde_enc->cur_master->in_clone_mode;
		}

		bool sde_encoder_is_primary_display(struct drm_encoder *drm_enc)
		{
		struct sde_encoder_virt *sde_enc = to_sde_encoder_virt(drm_enc);

		return sde_enc && sde_enc->disp_info.is_primary;
		}

		int sde_encoder_in_cont_splash(struct drm_encoder *drm_enc)
		{
		struct sde_encoder_virt *sde_enc = to_sde_encoder_virt(drm_enc);

+8 −0

Original line number	Diff line number	Diff line
		@@ -281,6 +281,14 @@ void sde_encoder_recovery_events_handler(struct drm_encoder *encoder,
		*/
		int sde_encoder_in_clone_mode(struct drm_encoder *enc);

		/**
		* sde_encoder_is_primary_display - checks if underlying display is primary
		* display or not.
		* @drm_enc: Pointer to drm encoder structure
		* @Return: true if it is primary display. false if secondary display
		*/
		bool sde_encoder_is_primary_display(struct drm_encoder *enc);

		/**
		* sde_encoder_control_idle_pc - control enable/disable of idle power collapse
		* @drm_enc: Pointer to drm encoder structure

+11 −7

Original line number	Diff line number	Diff line
		@@ -1438,14 +1438,18 @@ static int _sde_rm_populate_requirements(
		return -EINVAL;
		}

		/**
		* Set the requirement based on caps if not set from user space
		* This will ensure to select LM tied with DS blocks
		* Currently, DS blocks are tied with LM 0 and LM 1 (primary display)
		/*
		* select dspp HW block for all dsi displays and ds for only
		* primary dsi display.
		*/
		if (conn_state->connector->connector_type == DRM_MODE_CONNECTOR_DSI) {
		if (!RM_RQ_DSPP(reqs))
		reqs->top_ctrl \|= BIT(SDE_RM_TOPCTL_DSPP);

		if (!RM_RQ_DS(reqs) && rm->hw_mdp->caps->has_dest_scaler &&
		conn_state->connector->connector_type == DRM_MODE_CONNECTOR_DSI)
		sde_encoder_is_primary_display(enc))
		reqs->top_ctrl \|= BIT(SDE_RM_TOPCTL_DS);
		}

		/**
		* Set the requirement for LM which has CWB support if CWB is