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Commit d63fa0dc authored by Paulo Zanoni's avatar Paulo Zanoni Committed by Daniel Vetter
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drm/i915: don't limit Haswell CRT encoder to pipe A



This is a full revert of 59c859d6:
    drm/i915: account for only one PCH receiver on Haswell

Now that the PCH code is fixed to be able use the only PCH transcoder
independently of the pipe and CPU transcoder, we can revert this.

Signed-off-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: default avatarDamien Lespiau <damien.lespiau@intel.com>
[danvet: Resolve conflict due to the rebasing of dinq on top of
drm-next.]
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent b4a98e57
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+1 −1
Original line number Original line Diff line number Diff line
@@ -751,7 +751,7 @@ void intel_crt_init(struct drm_device *dev)


	crt->base.type = INTEL_OUTPUT_ANALOG;
	crt->base.type = INTEL_OUTPUT_ANALOG;
	crt->base.cloneable = true;
	crt->base.cloneable = true;
	if (IS_HASWELL(dev) || IS_I830(dev))
	if (IS_I830(dev))
		crt->base.crtc_mask = (1 << 0);
		crt->base.crtc_mask = (1 << 0);
	else
	else
		crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
		crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
+3 −12
Original line number Original line Diff line number Diff line
@@ -1149,14 +1149,9 @@ static void assert_fdi_rx(struct drm_i915_private *dev_priv,
	u32 val;
	u32 val;
	bool cur_state;
	bool cur_state;


	if (IS_HASWELL(dev_priv->dev) && pipe > 0) {
			DRM_ERROR("Attempting to enable FDI_RX on Haswell pipe > 0\n");
			return;
	} else {
	reg = FDI_RX_CTL(pipe);
	reg = FDI_RX_CTL(pipe);
	val = I915_READ(reg);
	val = I915_READ(reg);
	cur_state = !!(val & FDI_RX_ENABLE);
	cur_state = !!(val & FDI_RX_ENABLE);
	}
	WARN(cur_state != state,
	WARN(cur_state != state,
	     "FDI RX state assertion failure (expected %s, current %s)\n",
	     "FDI RX state assertion failure (expected %s, current %s)\n",
	     state_string(state), state_string(cur_state));
	     state_string(state), state_string(cur_state));
@@ -1189,10 +1184,6 @@ static void assert_fdi_rx_pll_enabled(struct drm_i915_private *dev_priv,
	int reg;
	int reg;
	u32 val;
	u32 val;


	if (IS_HASWELL(dev_priv->dev) && pipe > 0) {
		DRM_ERROR("Attempting to enable FDI on Haswell with pipe > 0\n");
		return;
	}
	reg = FDI_RX_CTL(pipe);
	reg = FDI_RX_CTL(pipe);
	val = I915_READ(reg);
	val = I915_READ(reg);
	WARN(!(val & FDI_RX_PLL_ENABLE), "FDI RX PLL assertion failure, should be active but is disabled\n");
	WARN(!(val & FDI_RX_PLL_ENABLE), "FDI RX PLL assertion failure, should be active but is disabled\n");