Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit d60de81d authored by Kenneth Graunke's avatar Kenneth Graunke Committed by Daniel Vetter
Browse files

drm/i915: Improve HiZ throughput on Cherryview.



Found by reading the HIZ_CHICKEN documentation.

Improves performance in a HiZ microbenchmark by around 50%.
Improves performance in OglZBuffer by around 18%.

Thanks to Chris Wilson for helping me figure out where to put this.

Signed-off-by: default avatarKenneth Graunke <kenneth@whitecape.org>
Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent c0a03a2e
Loading
Loading
Loading
Loading
+3 −0
Original line number Original line Diff line number Diff line
@@ -5202,6 +5202,9 @@ enum punit_power_well {
#define COMMON_SLICE_CHICKEN2			0x7014
#define COMMON_SLICE_CHICKEN2			0x7014
# define GEN8_CSC2_SBE_VUE_CACHE_CONSERVATIVE	(1<<0)
# define GEN8_CSC2_SBE_VUE_CACHE_CONSERVATIVE	(1<<0)


#define HIZ_CHICKEN				0x7018
# define CHV_HZ_8X8_MODE_IN_1X			(1<<15)

#define GEN7_L3SQCREG1				0xB010
#define GEN7_L3SQCREG1				0xB010
#define  VLV_B0_WA_L3SQCREG1_VALUE		0x00D30000
#define  VLV_B0_WA_L3SQCREG1_VALUE		0x00D30000


+3 −0
Original line number Original line Diff line number Diff line
@@ -836,6 +836,9 @@ static int chv_init_workarounds(struct intel_engine_cs *ring)
			  HDC_FORCE_NON_COHERENT |
			  HDC_FORCE_NON_COHERENT |
			  HDC_DONOT_FETCH_MEM_WHEN_MASKED);
			  HDC_DONOT_FETCH_MEM_WHEN_MASKED);


	/* Improve HiZ throughput on CHV. */
	WA_SET_BIT_MASKED(HIZ_CHICKEN, CHV_HZ_8X8_MODE_IN_1X);

	return 0;
	return 0;
}
}