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Commit d5b1a5f6 authored by Adrian Hunter's avatar Adrian Hunter Committed by Arnaldo Carvalho de Melo
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x86/insn: perf tools: Add new ptwrite instruction



Add ptwrite to the op code map and the perf tools new instructions test.
To run the test:

  $ tools/perf/perf test "x86 ins"
  39: Test x86 instruction decoder - new instructions          : Ok

Or to see the details:

  $ tools/perf/perf test -v "x86 ins" 2>&1 | grep ptwrite

For information about ptwrite, refer the Intel SDM.

Signed-off-by: default avatarAdrian Hunter <adrian.hunter@intel.com>
Acked-by: default avatarMasami Hiramatsu <mhiramat@kernel.org>
Link: http://lkml.kernel.org/r/1495180230-19367-1-git-send-email-adrian.hunter@intel.com


Signed-off-by: default avatarArnaldo Carvalho de Melo <acme@redhat.com>
parent 19f0edb9
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+1 −1
Original line number Diff line number Diff line
@@ -1009,7 +1009,7 @@ GrpTable: Grp15
1: fxstor | RDGSBASE Ry (F3),(11B)
2: vldmxcsr Md (v1) | WRFSBASE Ry (F3),(11B)
3: vstmxcsr Md (v1) | WRGSBASE Ry (F3),(11B)
4: XSAVE
4: XSAVE | ptwrite Ey (F3),(11B)
5: XRSTOR | lfence (11B)
6: XSAVEOPT | clwb (66) | mfence (11B)
7: clflush | clflushopt (66) | sfence (11B)
+1 −1
Original line number Diff line number Diff line
@@ -1009,7 +1009,7 @@ GrpTable: Grp15
1: fxstor | RDGSBASE Ry (F3),(11B)
2: vldmxcsr Md (v1) | WRFSBASE Ry (F3),(11B)
3: vstmxcsr Md (v1) | WRGSBASE Ry (F3),(11B)
4: XSAVE
4: XSAVE | ptwrite Ey (F3),(11B)
5: XRSTOR | lfence (11B)
6: XSAVEOPT | clwb (66) | mfence (11B)
7: clflush | clflushopt (66) | sfence (11B)
+12 −0
Original line number Diff line number Diff line
@@ -1664,3 +1664,15 @@
"0f c7 1d 78 56 34 12 \txrstors 0x12345678",},
{{0x0f, 0xc7, 0x9c, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "",
"0f c7 9c c8 78 56 34 12 \txrstors 0x12345678(%eax,%ecx,8)",},
{{0xf3, 0x0f, 0xae, 0x20, }, 4, 0, "", "",
"f3 0f ae 20          \tptwritel (%eax)",},
{{0xf3, 0x0f, 0xae, 0x25, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "",
"f3 0f ae 25 78 56 34 12 \tptwritel 0x12345678",},
{{0xf3, 0x0f, 0xae, 0xa4, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "",
"f3 0f ae a4 c8 78 56 34 12 \tptwritel 0x12345678(%eax,%ecx,8)",},
{{0xf3, 0x0f, 0xae, 0x20, }, 4, 0, "", "",
"f3 0f ae 20          \tptwritel (%eax)",},
{{0xf3, 0x0f, 0xae, 0x25, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "",
"f3 0f ae 25 78 56 34 12 \tptwritel 0x12345678",},
{{0xf3, 0x0f, 0xae, 0xa4, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "",
"f3 0f ae a4 c8 78 56 34 12 \tptwritel 0x12345678(%eax,%ecx,8)",},
+30 −0
Original line number Diff line number Diff line
@@ -1696,3 +1696,33 @@
"0f c7 9c c8 78 56 34 12 \txrstors 0x12345678(%rax,%rcx,8)",},
{{0x41, 0x0f, 0xc7, 0x9c, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "",
"41 0f c7 9c c8 78 56 34 12 \txrstors 0x12345678(%r8,%rcx,8)",},
{{0xf3, 0x0f, 0xae, 0x20, }, 4, 0, "", "",
"f3 0f ae 20          \tptwritel (%rax)",},
{{0xf3, 0x41, 0x0f, 0xae, 0x20, }, 5, 0, "", "",
"f3 41 0f ae 20       \tptwritel (%r8)",},
{{0xf3, 0x0f, 0xae, 0x24, 0x25, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "",
"f3 0f ae 24 25 78 56 34 12 \tptwritel 0x12345678",},
{{0xf3, 0x0f, 0xae, 0xa4, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "",
"f3 0f ae a4 c8 78 56 34 12 \tptwritel 0x12345678(%rax,%rcx,8)",},
{{0xf3, 0x41, 0x0f, 0xae, 0xa4, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 10, 0, "", "",
"f3 41 0f ae a4 c8 78 56 34 12 \tptwritel 0x12345678(%r8,%rcx,8)",},
{{0xf3, 0x0f, 0xae, 0x20, }, 4, 0, "", "",
"f3 0f ae 20          \tptwritel (%rax)",},
{{0xf3, 0x41, 0x0f, 0xae, 0x20, }, 5, 0, "", "",
"f3 41 0f ae 20       \tptwritel (%r8)",},
{{0xf3, 0x0f, 0xae, 0x24, 0x25, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "",
"f3 0f ae 24 25 78 56 34 12 \tptwritel 0x12345678",},
{{0xf3, 0x0f, 0xae, 0xa4, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "",
"f3 0f ae a4 c8 78 56 34 12 \tptwritel 0x12345678(%rax,%rcx,8)",},
{{0xf3, 0x41, 0x0f, 0xae, 0xa4, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 10, 0, "", "",
"f3 41 0f ae a4 c8 78 56 34 12 \tptwritel 0x12345678(%r8,%rcx,8)",},
{{0xf3, 0x48, 0x0f, 0xae, 0x20, }, 5, 0, "", "",
"f3 48 0f ae 20       \tptwriteq (%rax)",},
{{0xf3, 0x49, 0x0f, 0xae, 0x20, }, 5, 0, "", "",
"f3 49 0f ae 20       \tptwriteq (%r8)",},
{{0xf3, 0x48, 0x0f, 0xae, 0x24, 0x25, 0x78, 0x56, 0x34, 0x12, }, 10, 0, "", "",
"f3 48 0f ae 24 25 78 56 34 12 \tptwriteq 0x12345678",},
{{0xf3, 0x48, 0x0f, 0xae, 0xa4, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 10, 0, "", "",
"f3 48 0f ae a4 c8 78 56 34 12 \tptwriteq 0x12345678(%rax,%rcx,8)",},
{{0xf3, 0x49, 0x0f, 0xae, 0xa4, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 10, 0, "", "",
"f3 49 0f ae a4 c8 78 56 34 12 \tptwriteq 0x12345678(%r8,%rcx,8)",},
+30 −0
Original line number Diff line number Diff line
@@ -1343,6 +1343,26 @@ int main(void)
	asm volatile("xrstors 0x12345678(%rax,%rcx,8)");
	asm volatile("xrstors 0x12345678(%r8,%rcx,8)");

	/* ptwrite */

	asm volatile("ptwrite (%rax)");
	asm volatile("ptwrite (%r8)");
	asm volatile("ptwrite (0x12345678)");
	asm volatile("ptwrite 0x12345678(%rax,%rcx,8)");
	asm volatile("ptwrite 0x12345678(%r8,%rcx,8)");

	asm volatile("ptwritel (%rax)");
	asm volatile("ptwritel (%r8)");
	asm volatile("ptwritel (0x12345678)");
	asm volatile("ptwritel 0x12345678(%rax,%rcx,8)");
	asm volatile("ptwritel 0x12345678(%r8,%rcx,8)");

	asm volatile("ptwriteq (%rax)");
	asm volatile("ptwriteq (%r8)");
	asm volatile("ptwriteq (0x12345678)");
	asm volatile("ptwriteq 0x12345678(%rax,%rcx,8)");
	asm volatile("ptwriteq 0x12345678(%r8,%rcx,8)");

#else  /* #ifdef __x86_64__ */

	/* bound r32, mem (same op code as EVEX prefix) */
@@ -2653,6 +2673,16 @@ int main(void)
	asm volatile("xrstors (0x12345678)");
	asm volatile("xrstors 0x12345678(%eax,%ecx,8)");

	/* ptwrite */

	asm volatile("ptwrite (%eax)");
	asm volatile("ptwrite (0x12345678)");
	asm volatile("ptwrite 0x12345678(%eax,%ecx,8)");

	asm volatile("ptwritel (%eax)");
	asm volatile("ptwritel (0x12345678)");
	asm volatile("ptwritel 0x12345678(%eax,%ecx,8)");

#endif /* #ifndef __x86_64__ */

	/* Following line is a marker for the awk script - do not change */
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