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Commit d56d8b28 authored by Chris Wilson's avatar Chris Wilson Committed by Keith Packard
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drm/i915:: Disable FBC on SandyBridge 



Enabling FBC is causing the BLT ring to run between 10-100x slower than
normal and frequently lockup. The interim solution is disable FBC once
more until we know why.

Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: default avatarKeith Packard <keithp@keithp.com>
parent acb42a3b

drivers/gpu/drm/i915/intel_display.c

+1 −1
Original line number Diff line number Diff line
@@ -1872,7 +1872,7 @@ static void intel_update_fbc(struct drm_device *dev) 
	if (enable_fbc < 0) {

		DRM_DEBUG_KMS("fbc set to per-chip default\n");

		enable_fbc = 1;

		if (INTEL_INFO(dev)->gen <= 5)

		if (INTEL_INFO(dev)->gen <= 6)

			enable_fbc = 0;

	}

	if (!enable_fbc) {