Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit d55a4528 authored by Linus Torvalds's avatar Linus Torvalds
Browse files
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6:
  [SPARC64]: Define TASK_SIZE_OF()
  [SPARC64]: flush_ptrace_access() needs preemption disable.
  [SPARC64]: Update defconfig.
  [SPARC64]: Fix allnoconfig build, ptrace.c missing CONFIG_COMPAT checks.
  [SPARC64]: Fix __get_cpu_var in preemption-enabled area.
  [SPARC64]: Fix sparse warnings in arch/sparc64/kernel/signal.c
  [SPARC64]: Fix most sparse warnings in arch/sparc64/kernel/sys_sparc.c
  [SPARC64]: Fix sparse warnings in arch/sparc64/kernel/time.c
  [SPARC64]: Fix sparse warnings in arch/sparc64/kernel/ptrace.c
  [SPARC64]: Fix sparse warnings in arch/sparc64/kernel/irq.c
  [SPARC64]: Fix sparse warnings in arch/sparc64/kernel/iommu.c
  [SPARC64]: Fix sparse errors in arch/sparc64/kernel/traps.c
  [SPARC64]: Fix sparse warnings in arch/sparc64/kernel/{cpu,setup}.c
  [SPARC64]: Adjust {TLBTEMP,TSBMAP}_BASE.
  [SPARC64]: Make save_stack_trace() more efficient.
parents 08dcf29e c101b088
Loading
Loading
Loading
Loading
+8 −4
Original line number Diff line number Diff line
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.25-rc1
# Sun Feb 17 22:44:12 2008
# Linux kernel version: 2.6.25-rc3
# Wed Mar 26 04:33:35 2008
#
CONFIG_SPARC=y
CONFIG_SPARC64=y
@@ -55,9 +55,11 @@ CONFIG_POSIX_MQUEUE=y
# CONFIG_IKCONFIG is not set
CONFIG_LOG_BUF_SHIFT=18
# CONFIG_CGROUPS is not set
CONFIG_GROUP_SCHED=y
CONFIG_FAIR_GROUP_SCHED=y
CONFIG_FAIR_USER_SCHED=y
# CONFIG_FAIR_CGROUP_SCHED is not set
CONFIG_RT_GROUP_SCHED=y
CONFIG_USER_SCHED=y
# CONFIG_CGROUP_SCHED is not set
CONFIG_SYSFS_DEPRECATED=y
CONFIG_RELAY=y
CONFIG_NAMESPACES=y
@@ -482,6 +484,7 @@ CONFIG_SCSI_LOWLEVEL=y
# CONFIG_SCSI_IPS is not set
# CONFIG_SCSI_INITIO is not set
# CONFIG_SCSI_INIA100 is not set
# CONFIG_SCSI_MVSAS is not set
# CONFIG_SCSI_STEX is not set
# CONFIG_SCSI_SYM53C8XX_2 is not set
# CONFIG_SCSI_QLOGIC_1280 is not set
@@ -810,6 +813,7 @@ CONFIG_HWMON=y
# CONFIG_SENSORS_ADM1031 is not set
# CONFIG_SENSORS_ADM9240 is not set
# CONFIG_SENSORS_ADT7470 is not set
# CONFIG_SENSORS_ADT7473 is not set
# CONFIG_SENSORS_ATXP1 is not set
# CONFIG_SENSORS_DS1621 is not set
# CONFIG_SENSORS_I5K_AMB is not set
+6 −4
Original line number Diff line number Diff line
@@ -15,6 +15,8 @@
#include <asm/spitfire.h>
#include <asm/oplib.h>

#include "entry.h"

DEFINE_PER_CPU(cpuinfo_sparc, __cpu_data) = { 0 };

struct cpu_iu_info {
@@ -65,8 +67,6 @@ static struct cpu_iu_info linux_sparc_chips[] = {
char *sparc_cpu_type;
char *sparc_fpu_type;

unsigned int fsr_storage;

static void __init sun4v_cpu_probe(void)
{
	switch (sun4v_chip_type) {
@@ -94,8 +94,10 @@ void __init cpu_probe(void)
	unsigned long ver, fpu_vers, manuf, impl, fprs;
	int i;
	
	if (tlb_type == hypervisor)
		return sun4v_cpu_probe();
	if (tlb_type == hypervisor) {
		sun4v_cpu_probe();
		return;
	}

	fprs = fprs_read();
	fprs_write(FPRS_FEF);
+30 −0
Original line number Diff line number Diff line
@@ -1705,6 +1705,36 @@ __flushw_user:
2:	retl
	 nop

	/* Flush %fp and %i7 to the stack for all register
	 * windows active inside of the cpu.  This allows
	 * show_stack_trace() to avoid using an expensive
	 * 'flushw'.
	 */
	.globl		stack_trace_flush
	.type		stack_trace_flush,#function
stack_trace_flush:
	rdpr		%pstate, %o0
	wrpr		%o0, PSTATE_IE, %pstate

	rdpr		%cwp, %g1
	rdpr		%canrestore, %g2
	sub		%g1, 1, %g3

1:	brz,pn		%g2, 2f
	 sub		%g2, 1, %g2
	wrpr		%g3, %cwp
	stx		%fp, [%sp + STACK_BIAS + RW_V9_I6]
	stx		%i7, [%sp + STACK_BIAS + RW_V9_I7]
	ba,pt		%xcc, 1b
	 sub		%g3, 1, %g3

2:	wrpr		%g1, %cwp
	wrpr		%o0, %pstate

	retl
	 nop
	.size		stack_trace_flush,.-stack_trace_flush

#ifdef CONFIG_SMP
	.globl		hard_smp_processor_id
hard_smp_processor_id:
+196 −0
Original line number Diff line number Diff line
#ifndef _ENTRY_H
#define _ENTRY_H

#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/init.h>

extern char *sparc_cpu_type;
extern char *sparc_fpu_type;

extern void __init per_cpu_patch(void);
extern void __init sun4v_patch(void);
extern void __init boot_cpu_id_too_large(int cpu);
extern unsigned int dcache_parity_tl1_occurred;
extern unsigned int icache_parity_tl1_occurred;

extern asmlinkage void update_perfctrs(void);
extern asmlinkage void sparc_breakpoint(struct pt_regs *regs);
extern void timer_interrupt(int irq, struct pt_regs *regs);

extern void do_notify_resume(struct pt_regs *regs,
			     unsigned long orig_i0,
			     int restart_syscall,
			     unsigned long thread_info_flags);

extern asmlinkage void syscall_trace(struct pt_regs *regs,
				     int syscall_exit_p);

extern void bad_trap_tl1(struct pt_regs *regs, long lvl);

extern void do_fpe_common(struct pt_regs *regs);
extern void do_fpieee(struct pt_regs *regs);
extern void do_fpother(struct pt_regs *regs);
extern void do_tof(struct pt_regs *regs);
extern void do_div0(struct pt_regs *regs);
extern void do_illegal_instruction(struct pt_regs *regs);
extern void mem_address_unaligned(struct pt_regs *regs,
				  unsigned long sfar,
				  unsigned long sfsr);
extern void sun4v_do_mna(struct pt_regs *regs,
			 unsigned long addr,
			 unsigned long type_ctx);
extern void do_privop(struct pt_regs *regs);
extern void do_privact(struct pt_regs *regs);
extern void do_cee(struct pt_regs *regs);
extern void do_cee_tl1(struct pt_regs *regs);
extern void do_dae_tl1(struct pt_regs *regs);
extern void do_iae_tl1(struct pt_regs *regs);
extern void do_div0_tl1(struct pt_regs *regs);
extern void do_fpdis_tl1(struct pt_regs *regs);
extern void do_fpieee_tl1(struct pt_regs *regs);
extern void do_fpother_tl1(struct pt_regs *regs);
extern void do_ill_tl1(struct pt_regs *regs);
extern void do_irq_tl1(struct pt_regs *regs);
extern void do_lddfmna_tl1(struct pt_regs *regs);
extern void do_stdfmna_tl1(struct pt_regs *regs);
extern void do_paw(struct pt_regs *regs);
extern void do_paw_tl1(struct pt_regs *regs);
extern void do_vaw(struct pt_regs *regs);
extern void do_vaw_tl1(struct pt_regs *regs);
extern void do_tof_tl1(struct pt_regs *regs);
extern void do_getpsr(struct pt_regs *regs);

extern void spitfire_insn_access_exception(struct pt_regs *regs,
					   unsigned long sfsr,
					   unsigned long sfar);
extern void spitfire_insn_access_exception_tl1(struct pt_regs *regs,
					       unsigned long sfsr,
					       unsigned long sfar);
extern void spitfire_data_access_exception(struct pt_regs *regs,
					   unsigned long sfsr,
					   unsigned long sfar);
extern void spitfire_data_access_exception_tl1(struct pt_regs *regs,
					       unsigned long sfsr,
					       unsigned long sfar);
extern void spitfire_access_error(struct pt_regs *regs,
				  unsigned long status_encoded,
				  unsigned long afar);

extern void cheetah_fecc_handler(struct pt_regs *regs,
				 unsigned long afsr,
				 unsigned long afar);
extern void cheetah_cee_handler(struct pt_regs *regs,
				unsigned long afsr,
				unsigned long afar);
extern void cheetah_deferred_handler(struct pt_regs *regs,
				     unsigned long afsr,
				     unsigned long afar);
extern void cheetah_plus_parity_error(int type, struct pt_regs *regs);

extern void sun4v_insn_access_exception(struct pt_regs *regs,
					unsigned long addr,
					unsigned long type_ctx);
extern void sun4v_insn_access_exception_tl1(struct pt_regs *regs,
					    unsigned long addr,
					    unsigned long type_ctx);
extern void sun4v_data_access_exception(struct pt_regs *regs,
					unsigned long addr,
					unsigned long type_ctx);
extern void sun4v_data_access_exception_tl1(struct pt_regs *regs,
					    unsigned long addr,
					    unsigned long type_ctx);
extern void sun4v_resum_error(struct pt_regs *regs,
			      unsigned long offset);
extern void sun4v_resum_overflow(struct pt_regs *regs);
extern void sun4v_nonresum_error(struct pt_regs *regs,
				 unsigned long offset);
extern void sun4v_nonresum_overflow(struct pt_regs *regs);

extern unsigned long sun4v_err_itlb_vaddr;
extern unsigned long sun4v_err_itlb_ctx;
extern unsigned long sun4v_err_itlb_pte;
extern unsigned long sun4v_err_itlb_error;

extern void sun4v_itlb_error_report(struct pt_regs *regs, int tl);

extern unsigned long sun4v_err_dtlb_vaddr;
extern unsigned long sun4v_err_dtlb_ctx;
extern unsigned long sun4v_err_dtlb_pte;
extern unsigned long sun4v_err_dtlb_error;

extern void sun4v_dtlb_error_report(struct pt_regs *regs, int tl);
extern void hypervisor_tlbop_error(unsigned long err,
				   unsigned long op);
extern void hypervisor_tlbop_error_xcall(unsigned long err,
					 unsigned long op);

/* WARNING: The error trap handlers in assembly know the precise
 *	    layout of the following structure.
 *
 * C-level handlers in traps.c use this information to log the
 * error and then determine how to recover (if possible).
 */
struct cheetah_err_info {
/*0x00*/u64 afsr;
/*0x08*/u64 afar;

	/* D-cache state */
/*0x10*/u64 dcache_data[4];	/* The actual data	*/
/*0x30*/u64 dcache_index;	/* D-cache index	*/
/*0x38*/u64 dcache_tag;		/* D-cache tag/valid	*/
/*0x40*/u64 dcache_utag;	/* D-cache microtag	*/
/*0x48*/u64 dcache_stag;	/* D-cache snooptag	*/

	/* I-cache state */
/*0x50*/u64 icache_data[8];	/* The actual insns + predecode	*/
/*0x90*/u64 icache_index;	/* I-cache index	*/
/*0x98*/u64 icache_tag;		/* I-cache phys tag	*/
/*0xa0*/u64 icache_utag;	/* I-cache microtag	*/
/*0xa8*/u64 icache_stag;	/* I-cache snooptag	*/
/*0xb0*/u64 icache_upper;	/* I-cache upper-tag	*/
/*0xb8*/u64 icache_lower;	/* I-cache lower-tag	*/

	/* E-cache state */
/*0xc0*/u64 ecache_data[4];	/* 32 bytes from staging registers */
/*0xe0*/u64 ecache_index;	/* E-cache index	*/
/*0xe8*/u64 ecache_tag;		/* E-cache tag/state	*/

/*0xf0*/u64 __pad[32 - 30];
};
#define CHAFSR_INVALID		((u64)-1L)

/* This is allocated at boot time based upon the largest hardware
 * cpu ID in the system.  We allocate two entries per cpu, one for
 * TL==0 logging and one for TL >= 1 logging.
 */
extern struct cheetah_err_info *cheetah_error_log;

/* UPA nodes send interrupt packet to UltraSparc with first data reg
 * value low 5 (7 on Starfire) bits holding the IRQ identifier being
 * delivered.  We must translate this into a non-vector IRQ so we can
 * set the softint on this cpu.
 *
 * To make processing these packets efficient and race free we use
 * an array of irq buckets below.  The interrupt vector handler in
 * entry.S feeds incoming packets into per-cpu pil-indexed lists.
 *
 * If you make changes to ino_bucket, please update hand coded assembler
 * of the vectored interrupt trap handler(s) in entry.S and sun4v_ivec.S
 */
struct ino_bucket {
/*0x00*/unsigned long __irq_chain_pa;

	/* Virtual interrupt number assigned to this INO.  */
/*0x08*/unsigned int __virt_irq;
/*0x0c*/unsigned int __pad;
};

extern struct ino_bucket *ivector_table;
extern unsigned long ivector_table_pa;

extern void handler_irq(int irq, struct pt_regs *regs);
extern void init_irqwork_curcpu(void);
extern void __cpuinit sun4v_register_mondo_queues(int this_cpu);

#endif /* _ENTRY_H */
+4 −4
Original line number Diff line number Diff line
@@ -626,7 +626,7 @@ static int dma_4u_map_sg(struct device *dev, struct scatterlist *sglist,
iommu_map_failed:
	for_each_sg(sglist, s, nelems, i) {
		if (s->dma_length != 0) {
			unsigned long vaddr, npages, entry, i;
			unsigned long vaddr, npages, entry, j;
			iopte_t *base;

			vaddr = s->dma_address & IO_PAGE_MASK;
@@ -637,8 +637,8 @@ static int dma_4u_map_sg(struct device *dev, struct scatterlist *sglist,
				>> IO_PAGE_SHIFT;
			base = iommu->page_table + entry;

			for (i = 0; i < npages; i++)
				iopte_make_dummy(iommu, base + i);
			for (j = 0; j < npages; j++)
				iopte_make_dummy(iommu, base + j);

			s->dma_address = DMA_ERROR_CODE;
			s->dma_length = 0;
@@ -803,7 +803,7 @@ static void dma_4u_sync_sg_for_cpu(struct device *dev,
	spin_unlock_irqrestore(&iommu->lock, flags);
}

const struct dma_ops sun4u_dma_ops = {
static const struct dma_ops sun4u_dma_ops = {
	.alloc_coherent		= dma_4u_alloc_coherent,
	.free_coherent		= dma_4u_free_coherent,
	.map_single		= dma_4u_map_single,
Loading