Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit d530d303 authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
Browse files

Merge "ARM: dts: msm: Replace devbw freq tables with OPP tables for SM8150"

parents 33d4c99d e6ea8228

Documentation/devicetree/bindings/devfreq/devbw.txt

+33 −14
Original line number Diff line number Diff line
@@ -9,11 +9,11 @@ Required properties: 
- compatible:		Must be "qcom,devbw"

- qcom,src-dst-ports:	A list of tuples where each tuple consists of a bus

			master port number and a bus slave port number.

- qcom,bw-tbl:		A list of meaningful instantaneous bandwidth values

			(in MB/s) that can be requested from the device

			master port to the slave port. The list of values

			depend on the supported bus/slave frequencies and the

			bus width.

- operating-points-v2:	A phandle to the OPP v2 table that holds meaningful

			instantaneous bandwidth values (in MB/s) that can be

			requested from the device master port to the slave port.

			The list of values depend on the supported bus/slave

			frequencies and the bus width.



Optional properties:

- qcom,active-only:	Indicates that the bandwidth votes need to be
@@ -23,17 +23,36 @@ Optional properties: 


Example:



	bw_opp_table: bw-opp-table {

		compatible = "operating-points-v2";

		opp-75  {

			opp-hz = /bits/ 64 <  572 >; /*  75 MHz */

		};

		opp-150 {

			opp-hz = /bits/ 64 < 1144 >; /* 150 MHz */

		};

		opp-200 {

			opp-hz = /bits/ 64 < 1525 >; /* 200 MHz */

		};

		opp-307 {

			opp-hz = /bits/ 64 < 2342 >; /* 307 MHz */

		};

		opp-460 {

			opp-hz = /bits/ 64 < 3509 >; /* 460 MHz */

		};

		opp-614 {

			opp-hz = /bits/ 64 < 4684 >; /* 614 MHz */

		};

		opp-800 {

			opp-hz = /bits/ 64 < 6103 >; /* 800 MHz */

		};

		opp-931 {

			opp-hz = /bits/ 64 < 7102 >; /* 931 MHz */

		};

	};

	qcom,cpubw {

		compatible = "qcom,devbw";

		qcom,src-dst-ports = <1 512>, <2 512>;

		qcom,active-only;

		qcom,bw-tbl =

			<  572 /*  75 MHz */ >,

			< 1144 /* 150 MHz */ >,

			< 1525 /* 200 MHz */ >,

			< 2342 /* 307 MHz */ >,

			< 3509 /* 460 MHz */ >,

			< 4684 /* 614 MHz */ >,

			< 6103 /* 800 MHz */ >,

			< 7102 /* 931 MHz */ >;

		operating-points-v2 = <&bw_opp_table>;

	};

arch/arm64/boot/dts/qcom/sm8150-gpu.dtsi

+1 −14
Original line number Diff line number Diff line
@@ -26,20 +26,7 @@ 
		compatible = "qcom,devbw";

		governor = "bw_vbif";

		qcom,src-dst-ports = <26 512>;

		qcom,bw-tbl =

			<     0 /*  off     */ >,

			<   381 /*  100 MHz */ >,

			<   572 /*  150 MHz */ >,

			<   762 /*  200 MHz */ >,

			<  1144 /*  300 MHz */ >,

			<  1571 /*  412 MHz */ >,

			<  2086 /*  547 MHz */ >,

			<  2597 /*  681 MHz */ >,

			<  2929 /*  768 MHz */ >,

			<  3879 /*  1017 MHz */ >,

			<  4943 /*  1296 MHz */ >,

			<  5931 /*  1555 MHz */ >,

			<  6881 /*  1804 MHz */ >;

		operating-points-v2 = <&suspendable_ddr_bw_opp_table>;

	};



	gpu_opp_table: gpu-opp-table {

arch/arm64/boot/dts/qcom/sm8150.dtsi

+59 −84
Original line number Diff line number Diff line
@@ -27,6 +27,7 @@ 
#include <dt-bindings/msm/msm-bus-ids.h>



#define MHZ_TO_MBPS(mhz, w) ((mhz * 1000000 * w) / (1024 * 1024))

#define BW_OPP_ENTRY(mhz, w) opp-mhz {opp-hz = /bits/ 64 <MHZ_TO_MBPS(mhz, w)>;}



/ {

	model = "Qualcomm Technologies, Inc. SM8150";
@@ -967,19 +968,23 @@ 
		reg-names = "lagg-base";

	};



	llcc_bw_opp_table: llcc-bw-opp-table {

		compatible = "operating-points-v2";

		BW_OPP_ENTRY( 150, 16); /*  2288 MB/s */

		BW_OPP_ENTRY( 200, 16); /*  3051 MB/s */

		BW_OPP_ENTRY( 403, 16); /*  6149 MB/s */

		BW_OPP_ENTRY( 533, 16); /*  8132 MB/s */

		BW_OPP_ENTRY( 666, 16); /* 10162 MB/s */

		BW_OPP_ENTRY( 777, 16); /* 11856 MB/s */

	};



	cpu_cpu_llcc_bw: qcom,cpu-cpu-llcc-bw {

		compatible = "qcom,devbw";

		governor = "performance";

		qcom,src-dst-ports =

			<MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_LLCC>;

		qcom,active-only;

		qcom,bw-tbl =

			< MHZ_TO_MBPS(150, 16) >, /*  2288 MB/s */

			< MHZ_TO_MBPS(200, 16) >, /*  4577 MB/s */

			< MHZ_TO_MBPS(403, 16) >, /*  6149 MB/s */

			< MHZ_TO_MBPS(533, 16) >, /*  8132 MB/s */

			< MHZ_TO_MBPS(666, 16) >, /* 10162 MB/s */

			< MHZ_TO_MBPS(777, 16) >; /* 11856 MB/s */

		operating-points-v2 = <&llcc_bw_opp_table>;

	};



	cpu_cpu_llcc_bwmon: qcom,cpu-cpu-llcc-bwmon@90b6400 {
@@ -993,24 +998,28 @@ 
		qcom,count-unit = <0x10000>;

	};



	ddr_bw_opp_table: ddr-bw-opp-table {

		compatible = "operating-points-v2";

		BW_OPP_ENTRY( 200, 4); /*  762 MB/s */

		BW_OPP_ENTRY( 300, 4); /* 1144 MB/s */

		BW_OPP_ENTRY( 451, 4); /* 1720 MB/s */

		BW_OPP_ENTRY( 547, 4); /* 2086 MB/s */

		BW_OPP_ENTRY( 681, 4); /* 2597 MB/s */

		BW_OPP_ENTRY( 768, 4); /* 2929 MB/s */

		BW_OPP_ENTRY(1017, 4); /* 3879 MB/s */

		BW_OPP_ENTRY(1296, 4); /* 4943 MB/s */

		BW_OPP_ENTRY(1555, 4); /* 5931 MB/s */

		BW_OPP_ENTRY(1804, 4); /* 6881 MB/s */

		BW_OPP_ENTRY(2092, 4); /* 7980 MB/s */

	};



	cpu_llcc_ddr_bw: qcom,cpu-llcc-ddr-bw {

		compatible = "qcom,devbw";

		governor = "performance";

		qcom,src-dst-ports =

			<MSM_BUS_MASTER_LLCC MSM_BUS_SLAVE_EBI_CH0>;

		qcom,active-only;

		qcom,bw-tbl =

			< MHZ_TO_MBPS( 200, 4) >, /* 762 MB/s */

			< MHZ_TO_MBPS( 300, 4) >, /* 1144 MB/s */

			< MHZ_TO_MBPS( 451, 4) >, /* 1720 MB/s */

			< MHZ_TO_MBPS( 547, 4) >, /* 2086 MB/s */

			< MHZ_TO_MBPS( 681, 4) >, /* 2597 MB/s */

			< MHZ_TO_MBPS( 768, 4) >, /* 2929 MB/s */

			< MHZ_TO_MBPS(1017, 4) >, /* 3879 MB/s */

			< MHZ_TO_MBPS(1296, 4) >, /* 4943 MB/s */

			< MHZ_TO_MBPS(1555, 4) >, /* 5931 MB/s */

			< MHZ_TO_MBPS(1804, 4) >, /* 6881 MB/s */

			< MHZ_TO_MBPS(2092, 4) >; /* 7980 MB/s */

		operating-points-v2 = <&ddr_bw_opp_table>;

	};



	cpu_llcc_ddr_bwmon: qcom,cpu-llcc-ddr-bwmon@90cd000 {
@@ -1023,23 +1032,27 @@ 
		qcom,count-unit = <0x10000>;

	};



	suspendable_ddr_bw_opp_table: suspendable-ddr-bw-opp-table {

		compatible = "operating-points-v2";

		BW_OPP_ENTRY(   0, 4); /*    0 MB/s */

		BW_OPP_ENTRY( 200, 4); /*  762 MB/s */

		BW_OPP_ENTRY( 300, 4); /* 1144 MB/s */

		BW_OPP_ENTRY( 451, 4); /* 1720 MB/s */

		BW_OPP_ENTRY( 547, 4); /* 2086 MB/s */

		BW_OPP_ENTRY( 681, 4); /* 2597 MB/s */

		BW_OPP_ENTRY( 768, 4); /* 2929 MB/s */

		BW_OPP_ENTRY(1017, 4); /* 3879 MB/s */

		BW_OPP_ENTRY(1296, 4); /* 4943 MB/s */

		BW_OPP_ENTRY(1555, 4); /* 5931 MB/s */

		BW_OPP_ENTRY(1804, 4); /* 6881 MB/s */

		BW_OPP_ENTRY(2092, 4); /* 7980 MB/s */

	};



	npu_npu_ddr_bw: qcom,npu-npu-ddr-bw {

		compatible = "qcom,devbw";

		governor = "performance";

		qcom,src-dst-ports = <MSM_BUS_MASTER_NPU MSM_BUS_SLAVE_EBI_CH0>;

		qcom,bw-tbl =

			< MHZ_TO_MBPS(   0, 4) >, /* 0 MB/s */

			< MHZ_TO_MBPS( 200, 4) >, /* 762 MB/s */

			< MHZ_TO_MBPS( 300, 4) >, /* 1144 MB/s */

			< MHZ_TO_MBPS( 451, 4) >, /* 1720 MB/s */

			< MHZ_TO_MBPS( 547, 4) >, /* 2086 MB/s */

			< MHZ_TO_MBPS( 681, 4) >, /* 2597 MB/s */

			< MHZ_TO_MBPS( 768, 4) >, /* 2929 MB/s */

			< MHZ_TO_MBPS(1017, 4) >, /* 3879 MB/s */

			< MHZ_TO_MBPS(1296, 4) >, /* 4943 MB/s */

			< MHZ_TO_MBPS(1555, 4) >, /* 5931 MB/s */

			< MHZ_TO_MBPS(1804, 4) >, /* 6881 MB/s */

			< MHZ_TO_MBPS(2092, 4) >; /* 7980 MB/s */

		operating-points-v2 = <&suspendable_ddr_bw_opp_table>;

	};



	npu_npu_ddr_bwmon: qcom,npu-npu-ddr-bwmon@9960300 {
@@ -1108,13 +1121,7 @@ 
		qcom,src-dst-ports =

			<MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_LLCC>;

		qcom,active-only;

		qcom,bw-tbl =

			< MHZ_TO_MBPS(150, 16) >, /*  2288 MB/s */

			< MHZ_TO_MBPS(200, 16) >, /*  4577 MB/s */

			< MHZ_TO_MBPS(403, 16) >, /*  6149 MB/s */

			< MHZ_TO_MBPS(533, 16) >, /*  8132 MB/s */

			< MHZ_TO_MBPS(666, 16) >, /* 10162 MB/s */

			< MHZ_TO_MBPS(777, 16) >; /* 11856 MB/s */

		operating-points-v2 = <&llcc_bw_opp_table>;

	};



	cpu0_cpu_llcc_latmon: qcom,cpu0-cpu-llcc-latmon {
@@ -1137,13 +1144,7 @@ 
		qcom,src-dst-ports =

			<MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_LLCC>;

		qcom,active-only;

		qcom,bw-tbl =

			< MHZ_TO_MBPS(150, 16) >, /*  2288 MB/s */

			< MHZ_TO_MBPS(200, 16) >, /*  4577 MB/s */

			< MHZ_TO_MBPS(403, 16) >, /*  6149 MB/s */

			< MHZ_TO_MBPS(533, 16) >, /*  8132 MB/s */

			< MHZ_TO_MBPS(666, 16) >, /* 10162 MB/s */

			< MHZ_TO_MBPS(777, 16) >; /* 11856 MB/s */

		operating-points-v2 = <&llcc_bw_opp_table>;

	};



	cpu4_cpu_llcc_latmon: qcom,cpu4-cpu-llcc-latmon {
@@ -1166,18 +1167,7 @@ 
		qcom,src-dst-ports =

			<MSM_BUS_MASTER_LLCC MSM_BUS_SLAVE_EBI_CH0>;

		qcom,active-only;

		qcom,bw-tbl =

			< MHZ_TO_MBPS( 200, 4) >, /* 762 MB/s */

			< MHZ_TO_MBPS( 300, 4) >, /* 1144 MB/s */

			< MHZ_TO_MBPS( 451, 4) >, /* 1720 MB/s */

			< MHZ_TO_MBPS( 547, 4) >, /* 2086 MB/s */

			< MHZ_TO_MBPS( 681, 4) >, /* 2597 MB/s */

			< MHZ_TO_MBPS( 768, 4) >, /* 2929 MB/s */

			< MHZ_TO_MBPS(1017, 4) >, /* 3879 MB/s */

			< MHZ_TO_MBPS(1296, 4) >, /* 4943 MB/s */

			< MHZ_TO_MBPS(1555, 4) >, /* 5931 MB/s */

			< MHZ_TO_MBPS(1804, 4) >, /* 6881 MB/s */

			< MHZ_TO_MBPS(2092, 4) >; /* 7980 MB/s */

		operating-points-v2 = <&ddr_bw_opp_table>;

	};



	cpu0_llcc_ddr_latmon: qcom,cpu0-llcc-ddr-latmon {
@@ -1200,18 +1190,7 @@ 
		qcom,src-dst-ports =

			<MSM_BUS_MASTER_LLCC MSM_BUS_SLAVE_EBI_CH0>;

		qcom,active-only;

		qcom,bw-tbl =

			< MHZ_TO_MBPS( 200, 4) >, /* 762 MB/s */

			< MHZ_TO_MBPS( 300, 4) >, /* 1144 MB/s */

			< MHZ_TO_MBPS( 451, 4) >, /* 1720 MB/s */

			< MHZ_TO_MBPS( 547, 4) >, /* 2086 MB/s */

			< MHZ_TO_MBPS( 681, 4) >, /* 2597 MB/s */

			< MHZ_TO_MBPS( 768, 4) >, /* 2929 MB/s */

			< MHZ_TO_MBPS(1017, 4) >, /* 3879 MB/s */

			< MHZ_TO_MBPS(1296, 4) >, /* 4943 MB/s */

			< MHZ_TO_MBPS(1555, 4) >, /* 5931 MB/s */

			< MHZ_TO_MBPS(1804, 4) >, /* 6881 MB/s */

			< MHZ_TO_MBPS(2092, 4) >; /* 7980 MB/s */

		operating-points-v2 = <&ddr_bw_opp_table>;

	};



	cpu4_llcc_ddr_latmon: qcom,cpu4-llcc-ddr-latmon {
@@ -1235,18 +1214,7 @@ 
		qcom,src-dst-ports =

			<MSM_BUS_MASTER_LLCC MSM_BUS_SLAVE_EBI_CH0>;

		qcom,active-only;

		qcom,bw-tbl =

			< MHZ_TO_MBPS( 200, 4) >, /* 762 MB/s */

			< MHZ_TO_MBPS( 300, 4) >, /* 1144 MB/s */

			< MHZ_TO_MBPS( 451, 4) >, /* 1720 MB/s */

			< MHZ_TO_MBPS( 547, 4) >, /* 2086 MB/s */

			< MHZ_TO_MBPS( 681, 4) >, /* 2597 MB/s */

			< MHZ_TO_MBPS( 768, 4) >, /* 2929 MB/s */

			< MHZ_TO_MBPS(1017, 4) >, /* 3879 MB/s */

			< MHZ_TO_MBPS(1296, 4) >, /* 4943 MB/s */

			< MHZ_TO_MBPS(1555, 4) >, /* 5931 MB/s */

			< MHZ_TO_MBPS(1804, 4) >, /* 6881 MB/s */

			< MHZ_TO_MBPS(2092, 4) >; /* 7980 MB/s */

		operating-points-v2 = <&ddr_bw_opp_table>;

	};



	cpu4_computemon: qcom,cpu4-computemon {
@@ -1328,13 +1296,20 @@ 
		clock-frequency = <32768>;

	};



	keepalive_opp_table: keepalive-opp-table {

		compatible = "operating-points-v2";

		opp-1 {

			opp-hz = /bits/ 64 < 1 >;

		};

	};



	snoc_cnoc_keepalive: qcom,snoc_cnoc_keepalive {

		compatible = "qcom,devbw";

		governor = "powersave";

		qcom,src-dst-ports = <1 627>;

		qcom,active-only;

		status = "ok";

		qcom,bw-tbl = < 1 >;

		operating-points-v2 = <&keepalive_opp_table>;

	};



	cdsp_keepalive: qcom,cdsp_keepalive {
@@ -1343,7 +1318,7 @@ 
		qcom,src-dst-ports = <154 10070>;

		qcom,active-only;

		status = "ok";

		qcom,bw-tbl = < 1 >;

		operating-points-v2 = <&keepalive_opp_table>;

	};



	clock_rpmh: qcom,rpmhclk {

drivers/devfreq/devfreq_devbw.c

+10 −47
Original line number Diff line number Diff line 
/*

 * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.

 * Copyright (c) 2013-2014, 2018, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -78,33 +78,15 @@ static int set_bw(struct device *dev, int new_ib, int new_ab) 
	return ret;

}



static void find_freq(struct devfreq_dev_profile *p, unsigned long *freq,

			u32 flags)

{

	int i;

	unsigned long atmost, atleast, f;



	atmost = p->freq_table[0];

	atleast = p->freq_table[p->max_state-1];

	for (i = 0; i < p->max_state; i++) {

		f = p->freq_table[i];

		if (f <= *freq)

			atmost = max(f, atmost);

		if (f >= *freq)

			atleast = min(f, atleast);

	}



	if (flags & DEVFREQ_FLAG_LEAST_UPPER_BOUND)

		*freq = atmost;

	else

		*freq = atleast;

}



static int devbw_target(struct device *dev, unsigned long *freq, u32 flags)

{

	struct dev_data *d = dev_get_drvdata(dev);

	struct dev_pm_opp *opp;



	opp = devfreq_recommended_opp(dev, freq, flags);

	if (!IS_ERR(opp))

		dev_pm_opp_put(opp);



	find_freq(&d->dp, freq, flags);

	return set_bw(dev, *freq, d->gov_ab);

}
@@ -118,14 +100,13 @@ static int devbw_get_dev_status(struct device *dev, 
}



#define PROP_PORTS "qcom,src-dst-ports"

#define PROP_TBL "qcom,bw-tbl"

#define PROP_ACTIVE "qcom,active-only"



int devfreq_add_devbw(struct device *dev)

{

	struct dev_data *d;

	struct devfreq_dev_profile *p;

	u32 *data, ports[MAX_PATHS * 2];

	u32 ports[MAX_PATHS * 2];

	const char *gov_name;

	int ret, len, i, num_paths;
@@ -174,27 +155,9 @@ int devfreq_add_devbw(struct device *dev) 
	p->target = devbw_target;

	p->get_dev_status = devbw_get_dev_status;



	if (of_find_property(dev->of_node, PROP_TBL, &len)) {

		len /= sizeof(*data);

		data = devm_kzalloc(dev, len * sizeof(*data), GFP_KERNEL);

		if (!data)

			return -ENOMEM;



		p->freq_table = devm_kzalloc(dev,

					     len * sizeof(*p->freq_table),

					     GFP_KERNEL);

		if (!p->freq_table)

			return -ENOMEM;



		ret = of_property_read_u32_array(dev->of_node, PROP_TBL,

						 data, len);

	ret = dev_pm_opp_of_add_table(dev);

	if (ret)

			return ret;



		for (i = 0; i < len; i++)

			p->freq_table[i] = data[i];

		p->max_state = len;

	}

		dev_err(dev, "Couldn't parse OPP table:%d\n", ret);



	d->bus_client = msm_bus_scale_register_client(&d->bw_data);

	if (!d->bus_client) {