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Commit d4ec09ac authored by Ben Hutchings's avatar Ben Hutchings Committed by David S. Miller
Browse files

sfc: Do not reinitialise XAUI serdes before it has completed reset 



falcon_reset_xaui() waits for XGXS reset to complete, but the XAUI
serdes reset may take longer.  It needs to check both reset active
bits.

Signed-off-by: default avatarBen Hutchings <bhutchings@solarflare.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent aed0628d

drivers/net/sfc/falcon_hwdefs.h

+2 −0
Original line number Diff line number Diff line
@@ -700,6 +700,8 @@ 
/* XGXS/XAUI powerdown/reset register */

#define XX_PWR_RST_REG 0x1300



#define XX_SD_RST_ACT_LBN 16

#define XX_SD_RST_ACT_WIDTH 1

#define XX_PWRDND_EN_LBN 15

#define XX_PWRDND_EN_WIDTH 1

#define XX_PWRDNC_EN_LBN 14

drivers/net/sfc/falcon_xmac.c

+5 −3
Original line number Diff line number Diff line
@@ -64,13 +64,15 @@ int falcon_reset_xaui(struct efx_nic *efx) 
	efx_oword_t reg;

	int count;



	/* Start reset sequence */

	EFX_POPULATE_DWORD_1(reg, XX_RST_XX_EN, 1);

	falcon_write(efx, &reg, XX_PWR_RST_REG);



	/* Give some time for the link to establish */

	for (count = 0; count < 1000; count++) { /* wait upto 10ms */

	/* Wait up to 10 ms for completion, then reinitialise */

	for (count = 0; count < 1000; count++) {

		falcon_read(efx, &reg, XX_PWR_RST_REG);

		if (EFX_OWORD_FIELD(reg, XX_RST_XX_EN) == 0) {

		if (EFX_OWORD_FIELD(reg, XX_RST_XX_EN) == 0 &&

		    EFX_OWORD_FIELD(reg, XX_SD_RST_ACT) == 0) {

			falcon_setup_xaui(efx);

			return 0;

		}