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Commit d4dfb81a authored by Catherine Sullivan's avatar Catherine Sullivan Committed by Jeff Kirsher
Browse files

i40e: Populate and check pci bus speed and width 



Call i40e_set_pci_config_data from probe, then check that
we are in a 8GT/s x8 PCIe slot and send a warning if we are not.

Change-Id: I62815c574cee50d2787c50bbe956dde7a7a75a11
Signed-off-by: default avatarCatherine Sullivan <catherine.sullivan@intel.com>
Signed-off-by: default avatarJesse Brandeburg <jesse.brandeburg@intel.com>
Tested-by: default avatarKavindya Deegala <kavindya.s.deegala@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
parent 9c010ee0

drivers/net/ethernet/intel/i40e/i40e_common.c

+44 −0
Original line number Original line Diff line number Diff line
@@ -2029,3 +2029,47 @@ i40e_status i40e_set_filter_control(struct i40e_hw *hw, 




	return 0;

	return 0;

}

}

/**

 * i40e_set_pci_config_data - store PCI bus info

 * @hw: pointer to hardware structure

 * @link_status: the link status word from PCI config space

 *

 * Stores the PCI bus info (speed, width, type) within the i40e_hw structure

 **/

void i40e_set_pci_config_data(struct i40e_hw *hw, u16 link_status)

{

	hw->bus.type = i40e_bus_type_pci_express;



	switch (link_status & PCI_EXP_LNKSTA_NLW) {

	case PCI_EXP_LNKSTA_NLW_X1:

		hw->bus.width = i40e_bus_width_pcie_x1;

		break;

	case PCI_EXP_LNKSTA_NLW_X2:

		hw->bus.width = i40e_bus_width_pcie_x2;

		break;

	case PCI_EXP_LNKSTA_NLW_X4:

		hw->bus.width = i40e_bus_width_pcie_x4;

		break;

	case PCI_EXP_LNKSTA_NLW_X8:

		hw->bus.width = i40e_bus_width_pcie_x8;

		break;

	default:

		hw->bus.width = i40e_bus_width_unknown;

		break;

	}



	switch (link_status & PCI_EXP_LNKSTA_CLS) {

	case PCI_EXP_LNKSTA_CLS_2_5GB:

		hw->bus.speed = i40e_bus_speed_2500;

		break;

	case PCI_EXP_LNKSTA_CLS_5_0GB:

		hw->bus.speed = i40e_bus_speed_5000;

		break;

	case PCI_EXP_LNKSTA_CLS_8_0GB:

		hw->bus.speed = i40e_bus_speed_8000;

		break;

	default:

		hw->bus.speed = i40e_bus_speed_unknown;

		break;

	}

}

drivers/net/ethernet/intel/i40e/i40e_main.c

+23 −0
Original line number Original line Diff line number Diff line
@@ -7369,6 +7369,7 @@ static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 
	struct i40e_pf *pf;

	struct i40e_pf *pf;

	struct i40e_hw *hw;

	struct i40e_hw *hw;

	static u16 pfs_found;

	static u16 pfs_found;

	u16 link_status;

	int err = 0;

	int err = 0;

	u32 len;

	u32 len;
@@ -7603,6 +7604,28 @@ static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 
	mod_timer(&pf->service_timer,

	mod_timer(&pf->service_timer,

		  round_jiffies(jiffies + pf->service_timer_period));

		  round_jiffies(jiffies + pf->service_timer_period));





	/* Get the negotiated link width and speed from PCI config space */

	pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA, &link_status);



	i40e_set_pci_config_data(hw, link_status);



	dev_info(&pdev->dev, "PCI Express: %s %s\n",

		(hw->bus.speed == i40e_bus_speed_8000 ? "Speed 8.0GT/s" :

		 hw->bus.speed == i40e_bus_speed_5000 ? "Speed 5.0GT/s" :

		 hw->bus.speed == i40e_bus_speed_2500 ? "Speed 2.5GT/s" :

		 "Unknown"),

		(hw->bus.width == i40e_bus_width_pcie_x8 ? "Width x8" :

		 hw->bus.width == i40e_bus_width_pcie_x4 ? "Width x4" :

		 hw->bus.width == i40e_bus_width_pcie_x2 ? "Width x2" :

		 hw->bus.width == i40e_bus_width_pcie_x1 ? "Width x1" :

		 "Unknown"));



	if (hw->bus.width < i40e_bus_width_pcie_x8 ||

	    hw->bus.speed < i40e_bus_speed_8000) {

		dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");

		dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");

	}



	return 0;

	return 0;





	/* Unwind what we've done if something failed in the setup */

	/* Unwind what we've done if something failed in the setup */

drivers/net/ethernet/intel/i40e/i40e_prototype.h

+1 −0
Original line number Original line Diff line number Diff line
@@ -215,6 +215,7 @@ i40e_status i40e_read_nvm_buffer(struct i40e_hw *hw, u16 offset, 
					   u16 *words, u16 *data);

					   u16 *words, u16 *data);

i40e_status i40e_validate_nvm_checksum(struct i40e_hw *hw,

i40e_status i40e_validate_nvm_checksum(struct i40e_hw *hw,

						 u16 *checksum);

						 u16 *checksum);

void i40e_set_pci_config_data(struct i40e_hw *hw, u16 link_status);





/* prototype for functions used for SW locks */

/* prototype for functions used for SW locks */