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Commit d49c4e9f authored by Sudarshan Rajagopalan's avatar Sudarshan Rajagopalan Committed by Gerrit - the friendly Code Review server
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iommu: arm-smmu: Standardize deep pre-fetch errata workaround 



Some hardware revision might have the deep prefetch bug where
invalid entries in the prefetch window would cause improper
permissions to be cached for the valid entries in this window.
Enable the workaround on such hardware by aligning the start
and end of all mapped buffers to prefetch size boundary.

Change-Id: Ib9ffd84d6e30087baabef35781e74d0544856233
Signed-off-by: default avatarSudarshan Rajagopalan <sudaraja@codeaurora.org>
parent b79ef96c

Documentation/devicetree/bindings/iommu/arm,smmu.txt

+8 −0
Original line number Diff line number Diff line
@@ -129,6 +129,14 @@ conditions. 
                  clients who do not detach, it's not possible to keep regulator

                  vote while smmu is attached. Type is <u32>.



- qcom,min-iova-align:

		  Some hardware revision might have the deep prefetch bug where

		  invalid entries in the prefetch window would cause improper

		  permissions to be cached for the valid entries in this window.

		  Enable the workaround on such hardware by aligning the start

		  and end of all mapped buffers to prefetch size boundary, which

		  is defined by ARM_SMMU_MIN_IOVA_ALIGN.



- clocks        : List of clocks to be used during SMMU register access. See

                  Documentation/devicetree/bindings/clock/clock-bindings.txt

                  for information about the format. For each clock specified

drivers/iommu/arm-smmu.c

+5 −2
Original line number Diff line number Diff line
@@ -255,6 +255,7 @@ struct arm_smmu_device { 
#define ARM_SMMU_OPT_NO_ASID_RETENTION	(1 << 5)

#define ARM_SMMU_OPT_STATIC_CB		(1 << 6)

#define ARM_SMMU_OPT_DISABLE_ATOS	(1 << 7)

#define ARM_SMMU_OPT_MIN_IOVA_ALIGN	(1 << 8)

	u32				options;

	enum arm_smmu_arch_version	version;

	enum arm_smmu_implementation	model;
@@ -394,6 +395,7 @@ static struct arm_smmu_option_prop arm_smmu_options[] = { 
	{ ARM_SMMU_OPT_NO_ASID_RETENTION, "qcom,no-asid-retention" },

	{ ARM_SMMU_OPT_STATIC_CB, "qcom,enable-static-cb"},

	{ ARM_SMMU_OPT_DISABLE_ATOS, "qcom,disable-atos" },

	{ ARM_SMMU_OPT_MIN_IOVA_ALIGN, "qcom,min-iova-align" },

	{ 0, NULL},

};
@@ -5344,8 +5346,9 @@ static void qsmmuv500_init_cb(struct arm_smmu_domain *smmu_domain, 
	 * Prefetch only works properly if the start and end of all

	 * buffers in the page table are aligned to ARM_SMMU_MIN_IOVA_ALIGN.

	 */

	if ((iommudata->actlr >> QSMMUV500_ACTLR_DEEP_PREFETCH_SHIFT) &

			QSMMUV500_ACTLR_DEEP_PREFETCH_MASK)

	if (((iommudata->actlr >> QSMMUV500_ACTLR_DEEP_PREFETCH_SHIFT) &

			QSMMUV500_ACTLR_DEEP_PREFETCH_MASK) &&

				  (smmu->options & ARM_SMMU_OPT_MIN_IOVA_ALIGN))

		smmu_domain->qsmmuv500_errata1_min_iova_align = true;

}