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Commit d3aa0bfa authored by Archit Saxena's avatar Archit Saxena
Browse files

ARM: dts: msm: Correct cpu dump id for QCS405 



Correct cpu dump id to match with physical numbering by TZ SDI
rather than APPS logical numbering.

Change-Id: I6fdbe89b13f89d8aa63cd3a4fa37b21b88450e29
Signed-off-by: default avatarArchit Saxena <archsaxe@codeaurora.org>
parent 832d34e5

arch/arm64/boot/dts/qcom/qcs405-cpu.dtsi

+8 −8
Original line number Diff line number Diff line
@@ -158,35 +158,35 @@ 
		};

		qcom,l1_i_cache100 {

			qcom,dump-node = <&L1_I_100>;

			qcom,dump-id = <0x64>;

			qcom,dump-id = <0x60>;

		};

		qcom,l1_i_cache101 {

			qcom,dump-node = <&L1_I_101>;

			qcom,dump-id = <0x65>;

			qcom,dump-id = <0x61>;

		};

		qcom,l1_i_cache102 {

			qcom,dump-node = <&L1_I_102>;

			qcom,dump-id = <0x66>;

			qcom,dump-id = <0x62>;

		};

		qcom,l1_i_cache103 {

			qcom,dump-node = <&L1_I_103>;

			qcom,dump-id = <0x67>;

			qcom,dump-id = <0x63>;

		};

		qcom,l1_d_cache100 {

			qcom,dump-node = <&L1_D_100>;

			qcom,dump-id = <0x84>;

			qcom,dump-id = <0x80>;

		};

		qcom,l1_d_cache101 {

			qcom,dump-node = <&L1_D_101>;

			qcom,dump-id = <0x85>;

			qcom,dump-id = <0x81>;

		};

		qcom,l1_d_cache102 {

			qcom,dump-node = <&L1_D_102>;

			qcom,dump-id = <0x86>;

			qcom,dump-id = <0x82>;

		};

		qcom,l1_d_cache103 {

			qcom,dump-node = <&L1_D_103>;

			qcom,dump-id = <0x87>;

			qcom,dump-id = <0x83>;

		};

	};

};