Merge "drm/msm/sde: remove transfer time factor in pclk calculation" (d21c8506) · Commits · e / devices / android_kernel_oneplus_sm8150

drivers/gpu/drm/msm/dsi-staging/dsi_ctrl.c

+2 −11

Original line number	Diff line number	Diff line
		@@ -40,9 +40,6 @@
		#define TO_ON_OFF(x) ((x) ? "ON" : "OFF")

		#define CEIL(x, y) (((x) + ((y)-1)) / (y))

		#define TICKS_IN_MICRO_SECOND 1000000

		/**
		* enum dsi_ctrl_driver_ops - controller driver ops
		*/
		@@ -833,7 +830,7 @@ static int dsi_ctrl_update_link_freqs(struct dsi_ctrl *dsi_ctrl,
		{
		int rc = 0;
		u32 num_of_lanes = 0;
		u32 bpp, refresh_rate = TICKS_IN_MICRO_SECOND;
		u32 bpp;
		u64 h_period, v_period, bit_rate, pclk_rate, bit_rate_per_lane,
		byte_clk_rate;
		struct dsi_host_common_cfg *host_cfg = &config->common_config;
		@@ -858,13 +855,7 @@ static int dsi_ctrl_update_link_freqs(struct dsi_ctrl *dsi_ctrl,
		if (config->bit_clk_rate_hz_override == 0) {
		h_period = DSI_H_TOTAL_DSC(timing);
		v_period = DSI_V_TOTAL(timing);

		if (config->panel_mode == DSI_OP_CMD_MODE)
		do_div(refresh_rate, timing->mdp_transfer_time_us);
		else
		refresh_rate = timing->refresh_rate;

		bit_rate = h_period * v_period * refresh_rate * bpp;
		bit_rate = h_period * v_period * timing->refresh_rate * bpp;
		} else {
		bit_rate = config->bit_clk_rate_hz_override * num_of_lanes;
		}