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Commit d1d0d5ff authored by Nicholas Piggin's avatar Nicholas Piggin Committed by Michael Ellerman
Browse files

powerpc/64: Optimise set/clear of CTRL[RUN] (runlatch) 



On modern CPUs the CTRL register is read-only except bit 63 which is
the run latch control. This means it can be updated with a mtspr
rather than mfspr/mtspr.

To accomodate older CPUs (Cell at least), where there are other bits
in the register, we still do a read/modify/write on pre 2.06 CPUs.

Signed-off-by: default avatarNicholas Piggin <npiggin@gmail.com>
[mpe: Update change log to mention 2.06 workaround]
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
parent 7b76a1f5

arch/powerpc/kernel/process.c

+27 −8
Original line number Diff line number Diff line
@@ -1979,11 +1979,25 @@ void show_stack(struct task_struct *tsk, unsigned long *stack) 
void notrace __ppc64_runlatch_on(void)

{

	struct thread_info *ti = current_thread_info();



	if (cpu_has_feature(CPU_FTR_ARCH_206)) {

		/*

		 * Least significant bit (RUN) is the only writable bit of

		 * the CTRL register, so we can avoid mfspr. 2.06 is not the

		 * earliest ISA where this is the case, but it's convenient.

		 */

		mtspr(SPRN_CTRLT, CTRL_RUNLATCH);

	} else {

		unsigned long ctrl;



		/*

		 * Some architectures (e.g., Cell) have writable fields other

		 * than RUN, so do the read-modify-write.

		 */

		ctrl = mfspr(SPRN_CTRLF);

		ctrl |= CTRL_RUNLATCH;

		mtspr(SPRN_CTRLT, ctrl);

	}



	ti->local_flags |= _TLF_RUNLATCH;

}
@@ -1992,14 +2006,19 @@ void notrace __ppc64_runlatch_on(void) 
void notrace __ppc64_runlatch_off(void)

{

	struct thread_info *ti = current_thread_info();

	unsigned long ctrl;



	ti->local_flags &= ~_TLF_RUNLATCH;



	if (cpu_has_feature(CPU_FTR_ARCH_206)) {

		mtspr(SPRN_CTRLT, 0);

	} else {

		unsigned long ctrl;



		ctrl = mfspr(SPRN_CTRLF);

		ctrl &= ~CTRL_RUNLATCH;

		mtspr(SPRN_CTRLT, ctrl);

	}

}

#endif /* CONFIG_PPC64 */



unsigned long arch_align_stack(unsigned long sp)