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Commit d1514cd8 authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
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Merge "Merge remote-tracking branch 'remotes/origin/tmp-eca84e50' into msm-4.14"

parents 5bbc97f7 10289c48

Documentation/ABI/testing/sysfs-fs-f2fs

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@@ -101,6 +101,7 @@ Date: February 2015 
Contact:	"Jaegeuk Kim" <jaegeuk@kernel.org>

Description:

		 Controls the trimming rate in batch mode.

		 <deprecated>



What:		/sys/fs/f2fs/<disk>/cp_interval

Date:		October 2015

Documentation/devicetree/bindings/clock/sunxi-ccu.txt

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@@ -20,6 +20,7 @@ Required properties : 
		- "allwinner,sun50i-a64-ccu"

		- "allwinner,sun50i-a64-r-ccu"

		- "allwinner,sun50i-h5-ccu"

		- "allwinner,sun50i-h6-ccu"

		- "nextthing,gr8-ccu"



- reg: Must contain the registers base address and length
@@ -31,6 +32,9 @@ Required properties : 
- #clock-cells : must contain 1

- #reset-cells : must contain 1



For the main CCU on H6, one more clock is needed:

- "iosc": the SoC's internal frequency oscillator



For the PRCM CCUs on A83T/H3/A64, two more clocks are needed:

- "pll-periph": the SoC's peripheral PLL from the main CCU

- "iosc": the SoC's internal frequency oscillator

Documentation/devicetree/bindings/dma/mv-xor-v2.txt

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@@ -11,7 +11,11 @@ Required properties: 
  interrupts.



Optional properties:

- clocks: Optional reference to the clock used by the XOR engine.

- clocks: Optional reference to the clocks used by the XOR engine.

- clock-names: mandatory if there is a second clock, in this case the

   name must be "core" for the first clock and "reg" for the second

   one





Example:

Documentation/devicetree/bindings/pinctrl/axis,artpec6-pinctrl.txt

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@@ -20,7 +20,8 @@ Required subnode-properties: 
		gpio: cpuclkoutgrp0, udlclkoutgrp0, i2c1grp0, i2c2grp0,

		      i2c3grp0, i2s0grp0, i2s1grp0, i2srefclkgrp0, spi0grp0,

		      spi1grp0, pciedebuggrp0, uart0grp0, uart0grp1, uart1grp0,

		      uart2grp0, uart2grp1, uart3grp0, uart4grp0, uart5grp0

		      uart2grp0, uart2grp1, uart3grp0, uart4grp0, uart5grp0,

		      uart5nocts

		cpuclkout: cpuclkoutgrp0

		udlclkout: udlclkoutgrp0

		i2c1: i2c1grp0
@@ -37,7 +38,7 @@ Required subnode-properties: 
		uart2: uart2grp0, uart2grp1

		uart3: uart3grp0

		uart4: uart4grp0

		uart5: uart5grp0

		uart5: uart5grp0, uart5nocts

		nand: nandgrp0

		sdio0: sdio0grp0

		sdio1: sdio1grp0

Documentation/filesystems/f2fs.txt

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@@ -182,13 +182,15 @@ whint_mode=%s Control which write hints are passed down to block 
                       passes down hints with its policy.

alloc_mode=%s          Adjust block allocation policy, which supports "reuse"

                       and "default".

fsync_mode=%s          Control the policy of fsync. Currently supports "posix"

                       and "strict". In "posix" mode, which is default, fsync

                       will follow POSIX semantics and does a light operation

                       to improve the filesystem performance. In "strict" mode,

                       fsync will be heavy and behaves in line with xfs, ext4

                       and btrfs, where xfstest generic/342 will pass, but the

                       performance will regress.

fsync_mode=%s          Control the policy of fsync. Currently supports "posix",

                       "strict", and "nobarrier". In "posix" mode, which is

                       default, fsync will follow POSIX semantics and does a

                       light operation to improve the filesystem performance.

                       In "strict" mode, fsync will be heavy and behaves in line

                       with xfs, ext4 and btrfs, where xfstest generic/342 will

                       pass, but the performance will regress. "nobarrier" is

                       based on "posix", but doesn't issue flush command for

                       non-atomic files likewise "nobarrier" mount option.

test_dummy_encryption  Enable dummy encryption, which provides a fake fscrypt

                       context. The fake fscrypt context is used by xfstests.