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Commit d1344ce1 authored by Subbaraman Narayanamurthy's avatar Subbaraman Narayanamurthy
Browse files

power: qpnp-fg-gen4: Enable side loading of current during SOC re-estimate 



As per the hardware recommendation, clear the first logged main
current ADC values, enable side loading of current and voltage
before SOC re-estimate during battery profile loading. Clear the
side loading after SOC re-estimate is done.

Change-Id: Ibb5ceec79955ca9045e16916a0521dcf04f6a7da
Signed-off-by: default avatarSubbaraman Narayanamurthy <subbaram@codeaurora.org>
parent 068a5930

drivers/power/supply/qcom/qpnp-fg-gen4.c

+31 −1
Original line number Diff line number Diff line
@@ -177,6 +177,8 @@ 
#define CC_SOC_v2_OFFSET		0

#define MONOTONIC_SOC_v2_WORD		469

#define MONOTONIC_SOC_v2_OFFSET		0

#define FIRST_LOG_CURRENT_v2_WORD	471

#define FIRST_LOG_CURRENT_v2_OFFSET	0



static struct fg_irq_info fg_irqs[FG_GEN4_IRQ_MAX];
@@ -1737,7 +1739,7 @@ static void profile_load_work(struct work_struct *work) 
	struct fg_gen4_chip *chip = container_of(fg,

				struct fg_gen4_chip, fg);

	int64_t nom_cap_uah;

	u8 val, buf[2];

	u8 val, mask, buf[2];

	int rc;



	vote(fg->awake_votable, PROFILE_LOAD, true, 0);
@@ -1780,6 +1782,24 @@ static void profile_load_work(struct work_struct *work) 
		goto out;

	}



	/* Enable side loading for voltage and current */

	val = mask = BIT(0);

	rc = fg_sram_masked_write(fg, SYS_CONFIG_WORD,

			SYS_CONFIG_OFFSET, mask, val, FG_IMA_DEFAULT);

	if (rc < 0) {

		pr_err("Error in setting SYS_CONFIG_WORD[0], rc=%d\n", rc);

		goto out;

	}



	/* Clear first logged main current ADC values */

	buf[0] = buf[1] = 0;

	rc = fg_sram_write(fg, FIRST_LOG_CURRENT_v2_WORD,

			FIRST_LOG_CURRENT_v2_OFFSET, buf, 2, FG_IMA_DEFAULT);

	if (rc < 0) {

		pr_err("Error in clearing FIRST_LOG_CURRENT rc=%d\n", rc);

		goto out;

	}



	/* Set the profile integrity bit */

	val = HLOS_RESTART_BIT | PROFILE_LOAD_BIT;

	rc = fg_sram_write(fg, PROFILE_INTEGRITY_WORD,
@@ -1795,6 +1815,16 @@ static void profile_load_work(struct work_struct *work) 
		goto out;

	}



	/* Clear side loading for voltage and current */

	val = 0;

	mask = BIT(0);

	rc = fg_sram_masked_write(fg, SYS_CONFIG_WORD,

			SYS_CONFIG_OFFSET, mask, val, FG_IMA_DEFAULT);

	if (rc < 0) {

		pr_err("Error in clearing SYS_CONFIG_WORD[0], rc=%d\n", rc);

		goto out;

	}



	fg_dbg(fg, FG_STATUS, "SOC is ready\n");

	fg->profile_load_status = PROFILE_LOADED;