Commit d0d7b4a6 authored Dec 05, 2018 by Mao Jinlong

ARM: dts: msm: Add S1 bypass of tmc for SM6150



Currently IPA team doesn't enable the SMMU stage1. So disable the
smmu stage1 of tmc for SM6150.

Change-Id: If25b3f0e42c56951b23d10ec3a5ef1263f672b2b
Signed-off-by: Mao Jinlong <jinlmao@codeaurora.org>

parent 906ec760

arch/arm64/boot/dts/qcom/sm6150-coresight.dtsi

+1 −0

Original line number	Diff line number	Diff line
		@@ -109,6 +109,7 @@
		<0x6064000 0x15000>;
		reg-names = "tmc-base", "bam-base";

		qcom,smmu-s1-bypass;
		iommus = <&apps_smmu 0x01e0 0>,
		<&apps_smmu 0x00a0 0>;
		arm,buffer-size = <0x400000>;