Loading arch/arm64/boot/dts/qcom/msm-arm-smmu-sm8150.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -383,6 +383,6 @@ }; &kgsl_smmu { qcom,actlr = <0x0 0x407 0x1>; qcom,actlr = <0x0 0x407 0x303>; }; drivers/gpu/msm/adreno-gpulist.h +1 −0 Original line number Diff line number Diff line Loading @@ -397,5 +397,6 @@ static const struct adreno_gpu_core adreno_gpulist[] = { .gpmu_minor = 0x000, .gpmu_tsens = 0x000C000D, .max_power = 5448, .va_padding = SZ_64K, }, }; drivers/gpu/msm/adreno.c +8 −0 Original line number Diff line number Diff line Loading @@ -1281,6 +1281,14 @@ static int adreno_probe(struct platform_device *pdev) if (adreno_support_64bit(adreno_dev)) device->mmu.features |= KGSL_MMU_64BIT; /* Default to 4K alignment (in other words, no additional padding) */ device->mmu.va_padding = PAGE_SIZE; if (adreno_dev->gpucore->va_padding) { device->mmu.features |= KGSL_MMU_PAD_VA; device->mmu.va_padding = adreno_dev->gpucore->va_padding; } status = kgsl_device_platform_probe(device); if (status) { device->pdev = NULL; Loading drivers/gpu/msm/adreno.h +2 −0 Original line number Diff line number Diff line Loading @@ -355,6 +355,7 @@ struct adreno_firmware { * @regfw_name: Filename for the register sequence firmware * @gpmu_tsens: ID for the temporature sensor used by the GPMU * @max_power: Max possible power draw of a core, units elephant tail hairs * @va_padding: Size to pad allocations to, zero if not required */ struct adreno_gpu_core { enum adreno_gpurev gpurev; Loading Loading @@ -385,6 +386,7 @@ struct adreno_gpu_core { const char *regfw_name; unsigned int gpmu_tsens; unsigned int max_power; uint64_t va_padding; }; Loading drivers/gpu/msm/kgsl.c +4 −0 Original line number Diff line number Diff line Loading @@ -4361,6 +4361,10 @@ static unsigned long _get_svm_area(struct kgsl_process_private *private, return -ERANGE; if (flags & MAP_FIXED) { /* We must honor alignment requirements */ if (!IS_ALIGNED(hint, align)) return -EINVAL; /* we must use addr 'hint' or fail */ return _gpu_set_svm_region(private, entry, hint, len); } else if (hint != 0) { Loading Loading
arch/arm64/boot/dts/qcom/msm-arm-smmu-sm8150.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -383,6 +383,6 @@ }; &kgsl_smmu { qcom,actlr = <0x0 0x407 0x1>; qcom,actlr = <0x0 0x407 0x303>; };
drivers/gpu/msm/adreno-gpulist.h +1 −0 Original line number Diff line number Diff line Loading @@ -397,5 +397,6 @@ static const struct adreno_gpu_core adreno_gpulist[] = { .gpmu_minor = 0x000, .gpmu_tsens = 0x000C000D, .max_power = 5448, .va_padding = SZ_64K, }, };
drivers/gpu/msm/adreno.c +8 −0 Original line number Diff line number Diff line Loading @@ -1281,6 +1281,14 @@ static int adreno_probe(struct platform_device *pdev) if (adreno_support_64bit(adreno_dev)) device->mmu.features |= KGSL_MMU_64BIT; /* Default to 4K alignment (in other words, no additional padding) */ device->mmu.va_padding = PAGE_SIZE; if (adreno_dev->gpucore->va_padding) { device->mmu.features |= KGSL_MMU_PAD_VA; device->mmu.va_padding = adreno_dev->gpucore->va_padding; } status = kgsl_device_platform_probe(device); if (status) { device->pdev = NULL; Loading
drivers/gpu/msm/adreno.h +2 −0 Original line number Diff line number Diff line Loading @@ -355,6 +355,7 @@ struct adreno_firmware { * @regfw_name: Filename for the register sequence firmware * @gpmu_tsens: ID for the temporature sensor used by the GPMU * @max_power: Max possible power draw of a core, units elephant tail hairs * @va_padding: Size to pad allocations to, zero if not required */ struct adreno_gpu_core { enum adreno_gpurev gpurev; Loading Loading @@ -385,6 +386,7 @@ struct adreno_gpu_core { const char *regfw_name; unsigned int gpmu_tsens; unsigned int max_power; uint64_t va_padding; }; Loading
drivers/gpu/msm/kgsl.c +4 −0 Original line number Diff line number Diff line Loading @@ -4361,6 +4361,10 @@ static unsigned long _get_svm_area(struct kgsl_process_private *private, return -ERANGE; if (flags & MAP_FIXED) { /* We must honor alignment requirements */ if (!IS_ALIGNED(hint, align)) return -EINVAL; /* we must use addr 'hint' or fail */ return _gpu_set_svm_region(private, entry, hint, len); } else if (hint != 0) { Loading