Loading arch/arm64/boot/dts/qcom/sm8150-mhi.dtsi +826 −830 Original line number Diff line number Diff line Loading @@ -11,8 +11,7 @@ * GNU General Public License for more details. */ &pcie1 { pci,bus@1 { &pcie_rc1 { reg = <0 0 0 0 0>; mhi_0: qcom,mhi@0 { Loading Loading @@ -428,10 +427,8 @@ }; }; }; }; &pcie0 { pci,bus@1 { &pcie_rc0 { reg = <0 0 0 0 0>; mhi_1: qcom,mhi@0 { Loading Loading @@ -847,4 +844,3 @@ }; }; }; }; arch/arm64/boot/dts/qcom/sm8150-pcie.dtsi +8 −0 Original line number Diff line number Diff line Loading @@ -282,6 +282,10 @@ reset-names = "pcie_0_core_reset", "pcie_0_phy_reset"; pcie_rc0: pcie_rc0 { reg = <0 0 0 0 0>; }; }; pcie1: qcom,pcie@1c08000 { Loading Loading @@ -602,5 +606,9 @@ reset-names = "pcie_1_core_reset", "pcie_1_phy_reset"; pcie_rc1: pcie_rc1 { reg = <0 0 0 0 0>; }; }; }; Loading
arch/arm64/boot/dts/qcom/sm8150-mhi.dtsi +826 −830 Original line number Diff line number Diff line Loading @@ -11,8 +11,7 @@ * GNU General Public License for more details. */ &pcie1 { pci,bus@1 { &pcie_rc1 { reg = <0 0 0 0 0>; mhi_0: qcom,mhi@0 { Loading Loading @@ -428,10 +427,8 @@ }; }; }; }; &pcie0 { pci,bus@1 { &pcie_rc0 { reg = <0 0 0 0 0>; mhi_1: qcom,mhi@0 { Loading Loading @@ -847,4 +844,3 @@ }; }; }; };
arch/arm64/boot/dts/qcom/sm8150-pcie.dtsi +8 −0 Original line number Diff line number Diff line Loading @@ -282,6 +282,10 @@ reset-names = "pcie_0_core_reset", "pcie_0_phy_reset"; pcie_rc0: pcie_rc0 { reg = <0 0 0 0 0>; }; }; pcie1: qcom,pcie@1c08000 { Loading Loading @@ -602,5 +606,9 @@ reset-names = "pcie_1_core_reset", "pcie_1_phy_reset"; pcie_rc1: pcie_rc1 { reg = <0 0 0 0 0>; }; }; };