Loading drivers/gpu/drm/msm/sde/sde_encoder.c +3 −0 Original line number Diff line number Diff line Loading @@ -221,6 +221,7 @@ enum sde_enc_rc_states { struct sde_encoder_virt { struct drm_encoder base; spinlock_t enc_spinlock; struct mutex vblank_ctl_lock; uint32_t bus_scaling_client; uint32_t display_num_of_h_tiles; Loading Loading @@ -4777,6 +4778,7 @@ static int sde_encoder_setup_display(struct sde_encoder_virt *sde_enc, phys_params.parent = &sde_enc->base; phys_params.parent_ops = parent_ops; phys_params.enc_spinlock = &sde_enc->enc_spinlock; phys_params.vblank_ctl_lock = &sde_enc->vblank_ctl_lock; SDE_DEBUG("\n"); Loading Loading @@ -4922,6 +4924,7 @@ struct drm_encoder *sde_encoder_init( sde_enc->cur_master = NULL; spin_lock_init(&sde_enc->enc_spinlock); mutex_init(&sde_enc->vblank_ctl_lock); drm_enc = &sde_enc->base; drm_encoder_init(dev, drm_enc, &sde_encoder_funcs, drm_enc_mode, NULL); drm_encoder_helper_add(drm_enc, &sde_encoder_helper_funcs); Loading drivers/gpu/drm/msm/sde/sde_encoder_phys.h +2 −0 Original line number Diff line number Diff line Loading @@ -309,6 +309,7 @@ struct sde_encoder_phys { enum msm_display_compression_type comp_type; spinlock_t *enc_spinlock; enum sde_enc_enable_state enable_state; struct mutex *vblank_ctl_lock; atomic_t vblank_refcount; atomic_t vsync_cnt; atomic_t underrun_cnt; Loading Loading @@ -454,6 +455,7 @@ struct sde_enc_phys_init_params { enum sde_wb wb_idx; enum msm_display_compression_type comp_type; spinlock_t *enc_spinlock; struct mutex *vblank_ctl_lock; }; /** Loading drivers/gpu/drm/msm/sde/sde_encoder_phys_cmd.c +3 −0 Original line number Diff line number Diff line Loading @@ -784,6 +784,7 @@ static int sde_encoder_phys_cmd_control_vblank_irq( return -EINVAL; } mutex_lock(phys_enc->vblank_ctl_lock); refcount = atomic_read(&phys_enc->vblank_refcount); /* Slave encoders don't report vblank */ Loading Loading @@ -817,6 +818,7 @@ static int sde_encoder_phys_cmd_control_vblank_irq( enable, refcount, SDE_EVTLOG_ERROR); } mutex_unlock(phys_enc->vblank_ctl_lock); return ret; } Loading Loading @@ -1651,6 +1653,7 @@ struct sde_encoder_phys *sde_encoder_phys_cmd_init( phys_enc->split_role = p->split_role; phys_enc->intf_mode = INTF_MODE_CMD; phys_enc->enc_spinlock = p->enc_spinlock; phys_enc->vblank_ctl_lock = p->vblank_ctl_lock; cmd_enc->stream_sel = 0; phys_enc->enable_state = SDE_ENC_DISABLED; sde_encoder_phys_cmd_init_ops(&phys_enc->ops); Loading drivers/gpu/drm/msm/sde/sde_encoder_phys_vid.c +3 −0 Original line number Diff line number Diff line Loading @@ -666,6 +666,7 @@ static int sde_encoder_phys_vid_control_vblank_irq( return -EINVAL; } mutex_lock(phys_enc->vblank_ctl_lock); refcount = atomic_read(&phys_enc->vblank_refcount); vid_enc = to_sde_encoder_phys_vid(phys_enc); Loading Loading @@ -707,6 +708,7 @@ static int sde_encoder_phys_vid_control_vblank_irq( phys_enc->hw_intf->idx - INTF_0, enable, refcount, SDE_EVTLOG_ERROR); } mutex_unlock(phys_enc->vblank_ctl_lock); return ret; } Loading Loading @@ -1337,6 +1339,7 @@ struct sde_encoder_phys *sde_encoder_phys_vid_init( phys_enc->split_role = p->split_role; phys_enc->intf_mode = INTF_MODE_VIDEO; phys_enc->enc_spinlock = p->enc_spinlock; phys_enc->vblank_ctl_lock = p->vblank_ctl_lock; phys_enc->comp_type = p->comp_type; for (i = 0; i < INTR_IDX_MAX; i++) { irq = &phys_enc->irq[i]; Loading drivers/gpu/drm/msm/sde/sde_encoder_phys_wb.c +1 −0 Original line number Diff line number Diff line Loading @@ -1786,6 +1786,7 @@ struct sde_encoder_phys *sde_encoder_phys_wb_init( phys_enc->intf_mode = INTF_MODE_WB_LINE; phys_enc->intf_idx = p->intf_idx; phys_enc->enc_spinlock = p->enc_spinlock; phys_enc->vblank_ctl_lock = p->vblank_ctl_lock; atomic_set(&phys_enc->pending_retire_fence_cnt, 0); irq = &phys_enc->irq[INTR_IDX_WB_DONE]; Loading Loading
drivers/gpu/drm/msm/sde/sde_encoder.c +3 −0 Original line number Diff line number Diff line Loading @@ -221,6 +221,7 @@ enum sde_enc_rc_states { struct sde_encoder_virt { struct drm_encoder base; spinlock_t enc_spinlock; struct mutex vblank_ctl_lock; uint32_t bus_scaling_client; uint32_t display_num_of_h_tiles; Loading Loading @@ -4777,6 +4778,7 @@ static int sde_encoder_setup_display(struct sde_encoder_virt *sde_enc, phys_params.parent = &sde_enc->base; phys_params.parent_ops = parent_ops; phys_params.enc_spinlock = &sde_enc->enc_spinlock; phys_params.vblank_ctl_lock = &sde_enc->vblank_ctl_lock; SDE_DEBUG("\n"); Loading Loading @@ -4922,6 +4924,7 @@ struct drm_encoder *sde_encoder_init( sde_enc->cur_master = NULL; spin_lock_init(&sde_enc->enc_spinlock); mutex_init(&sde_enc->vblank_ctl_lock); drm_enc = &sde_enc->base; drm_encoder_init(dev, drm_enc, &sde_encoder_funcs, drm_enc_mode, NULL); drm_encoder_helper_add(drm_enc, &sde_encoder_helper_funcs); Loading
drivers/gpu/drm/msm/sde/sde_encoder_phys.h +2 −0 Original line number Diff line number Diff line Loading @@ -309,6 +309,7 @@ struct sde_encoder_phys { enum msm_display_compression_type comp_type; spinlock_t *enc_spinlock; enum sde_enc_enable_state enable_state; struct mutex *vblank_ctl_lock; atomic_t vblank_refcount; atomic_t vsync_cnt; atomic_t underrun_cnt; Loading Loading @@ -454,6 +455,7 @@ struct sde_enc_phys_init_params { enum sde_wb wb_idx; enum msm_display_compression_type comp_type; spinlock_t *enc_spinlock; struct mutex *vblank_ctl_lock; }; /** Loading
drivers/gpu/drm/msm/sde/sde_encoder_phys_cmd.c +3 −0 Original line number Diff line number Diff line Loading @@ -784,6 +784,7 @@ static int sde_encoder_phys_cmd_control_vblank_irq( return -EINVAL; } mutex_lock(phys_enc->vblank_ctl_lock); refcount = atomic_read(&phys_enc->vblank_refcount); /* Slave encoders don't report vblank */ Loading Loading @@ -817,6 +818,7 @@ static int sde_encoder_phys_cmd_control_vblank_irq( enable, refcount, SDE_EVTLOG_ERROR); } mutex_unlock(phys_enc->vblank_ctl_lock); return ret; } Loading Loading @@ -1651,6 +1653,7 @@ struct sde_encoder_phys *sde_encoder_phys_cmd_init( phys_enc->split_role = p->split_role; phys_enc->intf_mode = INTF_MODE_CMD; phys_enc->enc_spinlock = p->enc_spinlock; phys_enc->vblank_ctl_lock = p->vblank_ctl_lock; cmd_enc->stream_sel = 0; phys_enc->enable_state = SDE_ENC_DISABLED; sde_encoder_phys_cmd_init_ops(&phys_enc->ops); Loading
drivers/gpu/drm/msm/sde/sde_encoder_phys_vid.c +3 −0 Original line number Diff line number Diff line Loading @@ -666,6 +666,7 @@ static int sde_encoder_phys_vid_control_vblank_irq( return -EINVAL; } mutex_lock(phys_enc->vblank_ctl_lock); refcount = atomic_read(&phys_enc->vblank_refcount); vid_enc = to_sde_encoder_phys_vid(phys_enc); Loading Loading @@ -707,6 +708,7 @@ static int sde_encoder_phys_vid_control_vblank_irq( phys_enc->hw_intf->idx - INTF_0, enable, refcount, SDE_EVTLOG_ERROR); } mutex_unlock(phys_enc->vblank_ctl_lock); return ret; } Loading Loading @@ -1337,6 +1339,7 @@ struct sde_encoder_phys *sde_encoder_phys_vid_init( phys_enc->split_role = p->split_role; phys_enc->intf_mode = INTF_MODE_VIDEO; phys_enc->enc_spinlock = p->enc_spinlock; phys_enc->vblank_ctl_lock = p->vblank_ctl_lock; phys_enc->comp_type = p->comp_type; for (i = 0; i < INTR_IDX_MAX; i++) { irq = &phys_enc->irq[i]; Loading
drivers/gpu/drm/msm/sde/sde_encoder_phys_wb.c +1 −0 Original line number Diff line number Diff line Loading @@ -1786,6 +1786,7 @@ struct sde_encoder_phys *sde_encoder_phys_wb_init( phys_enc->intf_mode = INTF_MODE_WB_LINE; phys_enc->intf_idx = p->intf_idx; phys_enc->enc_spinlock = p->enc_spinlock; phys_enc->vblank_ctl_lock = p->vblank_ctl_lock; atomic_set(&phys_enc->pending_retire_fence_cnt, 0); irq = &phys_enc->irq[INTR_IDX_WB_DONE]; Loading