Commit ce74f975 authored Jul 30, 2018 by Namratha Siddappa

Merge commit 'AU287' into dev/msm-4.14-display



* commit '6f808a5a':
  Revert "ARM: dts: msm: enable dma-coherent attribute for UFS on SM8150"
  ARM: dts: msm: Reduce cycles between ESR pulses on SM8150 MTP
  power: qpnp-fg-gen4: Reduce ESR fast calibration time to 50s
  net: core: neighbour: Change the print format for addresses
  defconfig: sm6150: Enable clock controller drivers for SM6150
  ARM: dts: msm: Add icnss node on SM6150
  ARM: dts: msm: Update regulator handles for VDD_CX/VDD_MX for SM6150
  ARM: dts: msm: Update the clock_dispcc node on SM6150
  clk: qcom: Add display clock driver for SM6150
  ARM: dts: msm: Update the clock_camcc node on SM6150
  ARM: dts: msm: Add dtsi entries of USB for SM6150
  power: qpnp-qg: Add handling for SYS_SOC
  clk: qcom: camcc: Add support for 12MHz for mclk
  msm: vidc: skip sending old resolution buffers
  icnss: print return value for modem_shutdown_msg
  ARM: dts: msm: enable IP HW CH by default and disable for sm8150-sdx50
  soc: eud: Fix event handling for input suspend/unsuspend
  msm: kgsl: Add support for PDC register subsections
  net: cnss2: Add snapshot of CNSS2 driver
  power: smb1355: Fix multiple I2C addr issue
  phy: qcom-ufs: Update UFS PHY calibration sequence
  ARM: dts: msm: limit number of fastrpc sessions on SLPI for 8150
  sched/fair: fix issue with max_capacity
  ARM: dts: msm: reconfigure sdx50 memory access based on AC policy
  msm: adsprpc: disable bind/unbind of fastrpc driver from userspace
  rpmsg: glink: spi: Fix use after free of channel refcount
  rpmsg: glink: spi: Set tail pointer to 0 at end of FIFO
  mhi: controller: qcom: add support for sdxprairie device
  mhi: controller: qcom: add sysfs control for mhi power
  wil6210: fix RX buffers release and unmap
  wil6210: prevent usage of tx ring 0 for eDMA
  wil6210: allocate rx reorder buffer only if rx reorder is enabled
  ARM: dts: msm: Associate address with clock controller nodes for SM6150
  clk: qcom: clk-cpu-qcs405: Add support for vdd_hf_pll regulator
  clk: qcom: Kconfig: Add support to select GDSC flag for SM6150
  ARM: dts: msm: Increase ADSP ion heap by 4 MB for qcs405
  soc: qcom: dccv2: fix the Linked_List default value
  ARM: dts: msm: enable ETR SG as default and DCC with LL1 on qcs405
  soc: qcom: rpm-smd-debug: Fix potential memory leaks
  ARM: dts: msm: add bluetooth chip device node for sa8155
  power: qpnp-qg: Update GOOD_OCV after clearing the old data
  power: qpnp-fg-gen4: Fix esr_delta bounding error
  sdcardfs: Fix the format prints in sdcardfs
  ARM: dts: update PCIe PHY base address for sm8150 v2
  net: qrtr: Add non blocking option for tx_resume
  net: qrtr: Send BYE message for all nodes on ept
  ARM: dts: msm: Add GPU configuration for sm8150-v2
  power: smb5: Set OTG mode current limit
  ARM: dts: msm: Add labels for TDM nodes
  pinctrl: qcom: Use correct offset for UFS_RESET_CTL register
  soc: qcom: use spinlock with irq save in CDSPRM module
  qcs405_defconfig: Enable the tzlog driver.
  defconfig: qcs405: Enable Qseecom driver
  ARM: dts: msm: Change DCC cur list for sm8150
  clk: qcom: clk-cpu-osm: Add OSM clock driver support for SM6150
  input: synaptics_dsx: Propagating security fixes from msm-4.9
  ARM: dts: qcom: Add sdhc1/sdhc2 for sm6150 mtp/cdp
  clk: qcom: Add camera clock driver for SM6150
  ARM: dts: msm: Disable vibrator overdrive for pm6150
  ARM: dts: msm: Add cdsp pil node for sdmmagpie
  mhi: controller: qcom: add debug mode parameter for debug control
  ARM: dts: msm: add mhi host support for sm8150 PCIe RC0
  cnss_prealloc: Remove excessive warnings in cnss_prealloc driver
  ARM: dts: msm: Move audio overlay device tree file on SM8150 target
  rmnet: fix tx rmnet stats to work with UL aggregation
  Revert "sched/sysctl: check for min/max values for sched_{up,down}_migrate knobs"
  icnss: Change QMI timeout to 10sec
  power: qpnp-qg: Update VBAT_LOW fifo_length handling
  sound: usb: use er_mapped flag to indicate event ring mapped or not
  lowmemorykiller: fix cma accounting
  clk: qcom: Remove write update to EMAC_MISC register
  ARM: dts: msm: Enable QoS programming for qcs405
  defconfig: Enable kernel low memory killer for sdmsteppe
  ARM: dts: msm: Add sleep clock for HS PHY on QCS405
  ARM: dts: msm: add PMIC devices for sdmmagpie
  defconfig: msm: Enable CXIP LM cooling device driver for SM6150
  drivers: thermal: Add support for CX IPeak LM cooling device
  socinfo: Add support for ADP platform
  ARM: dts: msm: disable L0s for PCIe0 and PCIe1 on sm8150
  rtc: Disable alarm irq if alarm time is in the past
  defconfig: qcs405: Enable smp2p sleep state for qcs405
  coresight: tpdm: Don't disable clk and regulator when enabled
  power: qpnp-qg: Update ESR estimation parameters
  power: qpnp-qg: Move GOOD_OCV irq handling to suspend/resume
  drivers: net: rmnet: Power collapse UL change
  iommu: ignore scm_call return if SMC_ID not supported
  iommu: arm-smmu: Preallocate memory for map operation
  iommu: arm-smmu: Move most memory allocations to GFP_KERNEL
  dma-mapping: fix build when !CONFIG_ARM_SMMU
  iommu: arm-smmu: Program TTBR1 to a zero page
  iommu: arm-smmu: fix KW issues
  iommu: iommu-debug: limit memory address exposure
  iommu: iommu-debug: cleanup iommu debug
  iommu: Remove config dependency
  ARM: dts: msm: Add ADC_TM thermal nodes on SM8150
  ARM: dts: msm: Enable ADC_TM on PM8150B
  thermal: adc_tm: Update channel assignments for PM8150B 1.0
  soc: qcom: Fix module cleanup error in dfc
  iio: adc: Update reading USB_IN_V channel
  power: smb5-lib: Fix low USB input current limit issue
  defconfig: Enable USB configfs and function drivers
  defconfig: arm64: Enable ICE based HW FBE on sa8155
  net: bridge: Fix merge error
  msm: gsi: gsi channel mode switch spinlock correction
  msm: npu: Add firmware debug mode support
  ARM: dts: msm: enable display rsc for sa8155
  msm: ipa4: Update IPA_CFG registers for IPA4.5
  ARM: dts: msm: Add Qseecom node and Qseecom heap for qcs405
  msm: kgsl: Add a check before requesting GPU keepalive
  ARM: dts: msm: Enable NTAG device node for QCS405
  defconfig: Enable CONFIG_CMA_DEBUGFS for sdmsteppe
  ARM: dts: msm: Optimize NPU TPDM clk config for sm8150
  msm: vidc: Use data corrupt flag instead of error flag
  perf: don't leave group_entry on sibling list (use-after-free)
  fs: ext4: disable support for fallocate FALLOC_FL_PUNCH_HOLE
  msm: adsprpc: validate remote parameters pointer
  msm: adsprpc: validate dma physical address after mapping
  iommu: arm-smmu: add tlbi traces
  iommu: arm-smmu: modify iommu_errata_tlbi trace events
  iommu: dma-mapping-fast: Add standard ftrace events
  iommu: Expand ftrace events
  iommu: dma-mapping-fast: Fix error code for dma_map_sg
  iommu: fix smmu_secure_pool access list after free issue
  iommu: arm-smmu: Add smmu init latency measurement
  iommu: iommu-debug: Fix duplicate iommu_attachment entries
  iommu: arm-smmu: Fix locking issue
  Revert "iommu/io-pgtable-arm: Unmap and free table when overwriting with block"
  ARM: dts: msm: Enable UFS support on sm6150 IDP platform
  ARM: dts: msm: Add address base for swr on qcs405
  ARM: dts: msm: Correct GPU iommu protection range for SM8150
  clk: qcom: debugcc-qcs405: Update CPU measure node
  msm: kgsl: Enable IO coherency for A640
  ARM: dts: msm: add PM6150 PD PHY device
  clk: qcom: Update freq plan and FMAX corners for few GCC clocks
  leds: qpnp-vibrator-ldo: disable vibrator in suspend path
  qseecom: check if app is blocked when unloading app
  hdcp_qseecom: updating error codes
  msm: vidc: extend AVC level query support upto 6.2
  msm: vidc: extend AVC level support upto 6.2
  ARM: dts: msm: enable smmu s1 in wlan CBs
  msm: vidc: Correct buffer counts for secondary output mode
  timers, sched/clock: Hook into s2idle freeze path
  smp: Wake up all idle CPUs when suspending to idle
  smp: Do not wake up all idle CPUs
  drivers: cpuidle: lpm-levels: Support s2idle
  drivers: cpuidle: lpm-levels: Remove hotplug checking
  msm: ipa: fix the ipa-hw rules not clean
  input: touchpanel: Add Synaptics latest version 2.7 touchpanel driver
  msm: vidc: correctly calculate core workload
  usb: core: Add support to handle multi config audio device
  msm: kgsl: Keep a list of perfcounters per file descriptor
  ARM: dts: msm: update cpu core frequencies for qcs405 target
  msm: kgsl: Fix typo in a6xx snapshot
  msm: kgsl: Fix reading lm_sequence in _execute_reg_sequence()
  ip: limit use of gso_size to udp
  ARM: dts: msm: enable dma-coherent attribute for UFS on SM8150
  drivers: thermal: bcl_pmic5: Incorporate thermometer encoding
  esoc: Check for modem status LOW prior to error handling

Change-Id: I86ff9d6fc5dd1dfe8e0ae29a10135f6b12034c01
Signed-off-by: Namratha Siddappa <namratha@codeaurora.org>

parents d5c54353 6f808a5a

Documentation/devicetree/bindings/arm/msm/qcom,osm.txt

+2 −1

Original line number	Diff line number	Diff line
		@@ -9,7 +9,8 @@ Properties:
		- compatible
		Usage: required
		Value type: <string>
		Definition: must be "qcom,clk-cpu-osm" or "qcom,clk-cpu-osm-sdmshrike".
		Definition: must be "qcom,clk-cpu-osm" or "qcom,clk-cpu-osm-sdmshrike"
		or "qcom,clk-cpu-osm-sm6150".

		- reg
		Usage: required

Documentation/devicetree/bindings/clock/qcom,camcc.txt

+1 −1

Original line number	Diff line number	Diff line
		@@ -3,7 +3,7 @@ Qualcomm Technologies, Inc. Camera Clock & Reset Controller Binding

		Required properties :
		- compatible : must contain "qcom,camcc-sm8150", "qcom,camcc-sm8150-v2"
		or "qcom,camcc-sdmshrike".
		or "qcom,camcc-sdmshrike" or "qcom,camcc-sm6150".
		- reg : shall contain base register location and length.
		- reg-names: names of registers listed in the same order as in
		the reg property.

Documentation/devicetree/bindings/clock/qcom,dispcc.txt

+2 −1

Original line number	Diff line number	Diff line
		@@ -2,7 +2,8 @@ Qualcomm Technologies, Inc. Display Clock & Reset Controller Binding
		--------------------------------------------------------------------

		Required properties :
		- compatible : Shall contain "qcom,dispcc-sm8150" or "qcom,dispcc-sm8150-v2".
		- compatible : Shall contain "qcom,dispcc-sm8150" or "qcom,dispcc-sm8150-v2" or
		"qcom,dispcc-sm6150".
		- reg : Shall contain base register location and length.
		- reg-names: Address name. Must be "cc_base".
		- vdd_mm-supply: phandle to the MM_CX rail that needs to be voted on behalf

Documentation/devicetree/bindings/clock/qcom,qcs405-cpucc.txt

+4 −2

Original line number	Diff line number	Diff line
		@@ -13,7 +13,8 @@ Required properties:
		- reg: Shall contain base register offset and size.
		- reg-names: Names of the bases for the above registers. Shall contain following:
		"apcs_cmd", "apcs_pll"
		- vdd_dig_ao-supply: The regulator powering the APSS PLL.
		- vdd_dig_ao-supply: The regulator(active only) powering the digital logic of APSS PLL.
		- vdd_hf_pll-supply: The regulator(active only) powering the Analog logic of APSS PLL.
		- cpu-vdd-supply: The regulator powering the APSS RCG.
		- qcom,speedX-bin-vZ: A table of CPU frequency (Hz) to regulator voltage (uV) mapping.
		Format: <freq uV>
		@@ -37,7 +38,8 @@ Example:
		<0xb016000 0x34>;
		reg-names = "apcs_cmd" , "apcs_pll";
		cpu-vdd-supply = <&apc_vreg_corner>;
		vdd_dig_ao-supply = <&pmd9655_s1_level>;
		vdd_dig_ao-supply = <&pmd9655_s1_level_ao>;
		vdd_hf_pll-supply = <&pms405_l5_ao>;
		qcom,speed0-bin-v0 =
		< 0 0>,
		< 960000000 1>,

Documentation/devicetree/bindings/cnss/cnss-wlan.txt

0 → 100644

+78 −0

Original line number	Diff line number	Diff line
		* Qualcomm Technologies, Inc. ConNectivity SubSystem Platform Driver

		This platform driver adds support for the CNSS subsystem used for PCIe
		based Wi-Fi devices. It also adds support to integrate PCIe WLAN module
		to subsystem restart framework. Apart from that, it also manages the
		3.3V voltage regulator, WLAN Enable GPIO signal and PCIe link dynamically
		with support for suspend and resume by retaining the PCI config space
		states when PCIe link is shutdown. The main purpose of this device tree
		entry below is to invoke the CNSS platform driver and provide handle to
		the WLAN enable GPIO, 3.3V fixed voltage regulator resources. It also
		provides the reserved RAM dump memory location and size.

		Required properties:
		- compatible: "qcom,cnss" for QCA6174 device
		"qcom,cnss-qca6290" for QCA6290 device
		"qcom,cnss-qca6390" for QCA6390 device
		- wlan-en-gpio: WLAN_EN GPIO signal specified by the chip specifications
		- vdd-wlan-supply: phandle to the regulator device tree node
		- pinctrl-names: Names corresponding to the numbered pinctrl states
		- pinctrl-<n>: Pinctrl states as described in
		bindings/pinctrl/pinctrl-bindings.txt
		- qcom,wlan-rc-num: PCIe root complex number which WLAN chip is attached to

		Optional properties:
		- qcom,notify-modem-status: Boolean property to decide whether modem
		notification should be enabled or not in this
		platform
		- wlan-soc-swreg-supply: phandle to the external 1.15V regulator for QCA6174
		- wlan-ant-switch-supply: phandle to the 2.7V regulator for the antenna
		switch of QCA6174
		- qcom,wlan-uart-access: Boolean property to decide whether QCA6174
		has exclusive access to UART.
		- vdd-wlan-io-supply: phandle to the 1.8V IO regulator for QCA6174
		- vdd-wlan-xtal-supply: phandle to the 1.8V XTAL regulator for QCA6174
		- vdd-wlan-xtal-aon-supply: phandle to the LDO-4 regulator. This is needed
		on platforms where XTAL regulator depends on
		always on regulator in VDDmin.
		- vdd-wlan-core-supply: phandle to the 1.3V CORE regulator for QCA6174
		- vdd-wlan-sp2t-supply: phandle to the 2.7V SP2T regulator for QCA6174
		- qcom,smmu-s1-enable: Boolean property to decide whether to enable SMMU
		S1 stage or not
		- qcom,wlan-smmu-iova-address: I/O virtual address range as <start length>
		format to be used for allocations associated
		between WLAN/PCIe and SMMU
		- qcom,wlan-ramdump-dynamic: To enable CNSS RAMDUMP collection
		by providing the size of CNSS DUMP
		- reg: Memory regions defined as starting address and size
		- reg-names: Names of the memory regions defined in reg entry
		- wlan-bootstrap-gpio: WLAN_BOOTSTRAP GPIO signal specified by QCA6174
		which should be drived depending on platforms
		- qcom,is-dual-wifi-enabled: Boolean property to control wlan enable(wlan-en)
		gpio on dual-wifi platforms.
		- vdd-wlan-en-supply: WLAN_EN fixed regulator specified by QCA6174
		specifications.
		- qcom,wlan-en-vreg-support: Boolean property to decide the whether the
		WLAN_EN pin is a gpio or fixed regulator.
		- qcom,mhi: phandle to indicate the device which needs MHI support.
		- qcom,cap-tsf-gpio: WLAN_TSF_CAPTURED GPIO signal specified by the chip
		specifications, should be drived depending on products

		Example:

		qcom,cnss@0d400000 {
		compatible = "qcom,cnss";
		reg = <0x0d400000 0x200000>;
		reg-names = "ramdump";
		qcom,wlan-ramdump-dynamic = <0x200000>;
		wlan-en-gpio = <&msmgpio 82 0>;
		vdd-wlan-supply = <&wlan_vreg>;
		qcom,notify-modem-status;
		wlan-soc-swreg-supply = <&pma8084_l27>;
		pinctrl-names = "default";
		pinctrl-0 = <&cnss_default>;
		qcom,wlan-rc-num = <0>;
		qcom,wlan-smmu-iova-address = <0 0x10000000>;
		qcom,mhi = <&mhi_wlan>;
		qcom,cap-tsf-gpio = <&tlmm 126 1>;
		};