Loading drivers/platform/msm/ipa/ipa_v3/ipa_mpm.c +15 −0 Original line number Diff line number Diff line Loading @@ -301,6 +301,7 @@ struct ipa_mpm_dev_info { struct ipa_mpm_iova_addr data; u32 chdb_base; u32 erdb_base; bool is_cache_coherent; }; struct ipa_mpm_event_props { Loading Loading @@ -494,6 +495,12 @@ static dma_addr_t ipa_mpm_smmu_map(void *va_addr, unsigned long carved_iova = roundup(cb->next_addr, IPA_MPM_PAGE_SIZE); int ret = 0; /* check cache coherent */ if (ipa_mpm_ctx->dev_info.is_cache_coherent) { IPA_MPM_DBG(" enable cache coherent\n"); prot |= IOMMU_CACHE; } if (carved_iova >= cb->va_end) { IPA_MPM_ERR("running out of carved_iova %x\n", carved_iova); ipa_assert(); Loading Loading @@ -646,6 +653,12 @@ static u32 ipa_mpm_smmu_map_doorbell(enum mhip_smmu_domain_type smmu_domain, u32 iova = 0; u64 offset = 0; /* check cache coherent */ if (ipa_mpm_ctx->dev_info.is_cache_coherent) { IPA_MPM_DBG(" enable cache coherent\n"); prot |= IOMMU_CACHE; } if (carved_iova >= cb->va_end) { IPA_MPM_ERR("running out of carved_iova %x\n", carved_iova); ipa_assert(); Loading Loading @@ -2582,6 +2595,8 @@ static int ipa_mpm_populate_smmu_info(struct platform_device *pdev) ipa_mpm_ctx->dev_info.ipa_smmu_enabled = smmu_out.smmu_enable; /* get cache_coherent enable or not */ ipa_mpm_ctx->dev_info.is_cache_coherent = ap_cb->is_cache_coherent; if (of_property_read_u32_array(pdev->dev.of_node, "qcom,iova-mapping", carved_iova_ap_mapping, 2)) { IPA_MPM_ERR("failed to read of_node %s\n", Loading Loading
drivers/platform/msm/ipa/ipa_v3/ipa_mpm.c +15 −0 Original line number Diff line number Diff line Loading @@ -301,6 +301,7 @@ struct ipa_mpm_dev_info { struct ipa_mpm_iova_addr data; u32 chdb_base; u32 erdb_base; bool is_cache_coherent; }; struct ipa_mpm_event_props { Loading Loading @@ -494,6 +495,12 @@ static dma_addr_t ipa_mpm_smmu_map(void *va_addr, unsigned long carved_iova = roundup(cb->next_addr, IPA_MPM_PAGE_SIZE); int ret = 0; /* check cache coherent */ if (ipa_mpm_ctx->dev_info.is_cache_coherent) { IPA_MPM_DBG(" enable cache coherent\n"); prot |= IOMMU_CACHE; } if (carved_iova >= cb->va_end) { IPA_MPM_ERR("running out of carved_iova %x\n", carved_iova); ipa_assert(); Loading Loading @@ -646,6 +653,12 @@ static u32 ipa_mpm_smmu_map_doorbell(enum mhip_smmu_domain_type smmu_domain, u32 iova = 0; u64 offset = 0; /* check cache coherent */ if (ipa_mpm_ctx->dev_info.is_cache_coherent) { IPA_MPM_DBG(" enable cache coherent\n"); prot |= IOMMU_CACHE; } if (carved_iova >= cb->va_end) { IPA_MPM_ERR("running out of carved_iova %x\n", carved_iova); ipa_assert(); Loading Loading @@ -2582,6 +2595,8 @@ static int ipa_mpm_populate_smmu_info(struct platform_device *pdev) ipa_mpm_ctx->dev_info.ipa_smmu_enabled = smmu_out.smmu_enable; /* get cache_coherent enable or not */ ipa_mpm_ctx->dev_info.is_cache_coherent = ap_cb->is_cache_coherent; if (of_property_read_u32_array(pdev->dev.of_node, "qcom,iova-mapping", carved_iova_ap_mapping, 2)) { IPA_MPM_ERR("failed to read of_node %s\n", Loading