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Commit cdd3210c authored by David S. Miller's avatar David S. Miller
Browse files

Merge tag 'wireless-drivers-next-for-davem-2017-04-07' of... 

Merge tag 'wireless-drivers-next-for-davem-2017-04-07' of git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/wireless-drivers-next



Kalle Valo says:

====================
wireless-drivers-next patches for 4.12

Lots of bugfixes as usual but also some new features.

Major changes:

ath10k

* improve firmware download time for QCA6174 and QCA9377, especially
  helps resume time

ath9k_htc

* add support AirTies 1eda:2315 AR9271 device

rt2x00

* add support MT7620

mwifiex

* enable auto deep sleep mode for USB chipsets

brcmfmac

* add support for network namespaces (WIPHY_FLAG_NETNS_OK)
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents bf74b20d 1aed8964

drivers/bcma/driver_gpio.c

+1 −2
Original line number Diff line number Diff line
@@ -185,7 +185,6 @@ int bcma_gpio_init(struct bcma_drv_cc *cc) 
	chip->owner		= THIS_MODULE;

	chip->parent		= bcma_bus_get_host_dev(bus);

#if IS_BUILTIN(CONFIG_OF)

	if (cc->core->bus->hosttype == BCMA_HOSTTYPE_SOC)

	chip->of_node		= cc->core->dev.of_node;

#endif

	switch (bus->chipinfo.id) {

drivers/bcma/main.c

+3 −7
Original line number Diff line number Diff line
@@ -201,9 +201,6 @@ static void bcma_of_fill_device(struct device *parent, 
{

	struct device_node *node;



	if (!IS_ENABLED(CONFIG_OF_IRQ))

		return;



	node = bcma_of_find_child_device(parent, core);

	if (node)

		core->dev.of_node = node;
@@ -242,19 +239,18 @@ void bcma_prepare_core(struct bcma_bus *bus, struct bcma_device *core) 
	core->dev.release = bcma_release_core_dev;

	core->dev.bus = &bcma_bus_type;

	dev_set_name(&core->dev, "bcma%d:%d", bus->num, core->core_index);

	core->dev.parent = bcma_bus_get_host_dev(bus);

	if (core->dev.parent)

		bcma_of_fill_device(core->dev.parent, core);



	switch (bus->hosttype) {

	case BCMA_HOSTTYPE_PCI:

		core->dev.parent = &bus->host_pci->dev;

		core->dma_dev = &bus->host_pci->dev;

		core->irq = bus->host_pci->irq;

		break;

	case BCMA_HOSTTYPE_SOC:

		if (IS_ENABLED(CONFIG_OF) && bus->host_pdev) {

			core->dma_dev = &bus->host_pdev->dev;

			core->dev.parent = &bus->host_pdev->dev;

			if (core->dev.parent)

				bcma_of_fill_device(core->dev.parent, core);

		} else {

			core->dev.dma_mask = &core->dev.coherent_dma_mask;

			core->dma_dev = &core->dev;

drivers/net/wireless/ath/ath10k/bmi.c

+72 −0
Original line number Diff line number Diff line
@@ -19,12 +19,21 @@ 
#include "hif.h"

#include "debug.h"

#include "htc.h"

#include "hw.h"



void ath10k_bmi_start(struct ath10k *ar)

{

	int ret;



	ath10k_dbg(ar, ATH10K_DBG_BMI, "bmi start\n");



	ar->bmi.done_sent = false;



	/* Enable hardware clock to speed up firmware download */

	if (ar->hw_params.hw_ops->enable_pll_clk) {

		ret = ar->hw_params.hw_ops->enable_pll_clk(ar);

		ath10k_dbg(ar, ATH10K_DBG_BMI, "bmi enable pll ret %d\n", ret);

	}

}



int ath10k_bmi_done(struct ath10k *ar)
@@ -129,6 +138,69 @@ int ath10k_bmi_read_memory(struct ath10k *ar, 
	return 0;

}



int ath10k_bmi_write_soc_reg(struct ath10k *ar, u32 address, u32 reg_val)

{

	struct bmi_cmd cmd;

	u32 cmdlen = sizeof(cmd.id) + sizeof(cmd.write_soc_reg);

	int ret;



	ath10k_dbg(ar, ATH10K_DBG_BMI,

		   "bmi write soc register 0x%08x val 0x%08x\n",

		   address, reg_val);



	if (ar->bmi.done_sent) {

		ath10k_warn(ar, "bmi write soc register command in progress\n");

		return -EBUSY;

	}



	cmd.id = __cpu_to_le32(BMI_WRITE_SOC_REGISTER);

	cmd.write_soc_reg.addr = __cpu_to_le32(address);

	cmd.write_soc_reg.value = __cpu_to_le32(reg_val);



	ret = ath10k_hif_exchange_bmi_msg(ar, &cmd, cmdlen, NULL, NULL);

	if (ret) {

		ath10k_warn(ar, "Unable to write soc register to device: %d\n",

			    ret);

		return ret;

	}



	return 0;

}



int ath10k_bmi_read_soc_reg(struct ath10k *ar, u32 address, u32 *reg_val)

{

	struct bmi_cmd cmd;

	union bmi_resp resp;

	u32 cmdlen = sizeof(cmd.id) + sizeof(cmd.read_soc_reg);

	u32 resplen = sizeof(resp.read_soc_reg);

	int ret;



	ath10k_dbg(ar, ATH10K_DBG_BMI, "bmi read soc register 0x%08x\n",

		   address);



	if (ar->bmi.done_sent) {

		ath10k_warn(ar, "bmi read soc register command in progress\n");

		return -EBUSY;

	}



	cmd.id = __cpu_to_le32(BMI_READ_SOC_REGISTER);

	cmd.read_soc_reg.addr = __cpu_to_le32(address);



	ret = ath10k_hif_exchange_bmi_msg(ar, &cmd, cmdlen, &resp, &resplen);

	if (ret) {

		ath10k_warn(ar, "Unable to read soc register from device: %d\n",

			    ret);

		return ret;

	}



	*reg_val = __le32_to_cpu(resp.read_soc_reg.value);



	ath10k_dbg(ar, ATH10K_DBG_BMI, "bmi read soc register value 0x%08x\n",

		   *reg_val);



	return 0;

}



int ath10k_bmi_write_memory(struct ath10k *ar,

			    u32 address, const void *buffer, u32 length)

{

drivers/net/wireless/ath/ath10k/bmi.h

+2 −0
Original line number Diff line number Diff line
@@ -232,4 +232,6 @@ int ath10k_bmi_lz_stream_start(struct ath10k *ar, u32 address); 
int ath10k_bmi_lz_data(struct ath10k *ar, const void *buffer, u32 length);

int ath10k_bmi_fast_download(struct ath10k *ar, u32 address,

			     const void *buffer, u32 length);

int ath10k_bmi_read_soc_reg(struct ath10k *ar, u32 address, u32 *reg_val);

int ath10k_bmi_write_soc_reg(struct ath10k *ar, u32 address, u32 reg_val);

#endif /* _BMI_H_ */

drivers/net/wireless/ath/ath10k/core.c

+6 −2
Original line number Diff line number Diff line
@@ -166,7 +166,9 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
			.board_size = QCA6174_BOARD_DATA_SZ,

			.board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,

		},

		.hw_ops = &qca988x_ops,

		.hw_ops = &qca6174_ops,

		.hw_clk = qca6174_clk,

		.target_cpu_freq = 176000000,

		.decap_align_bytes = 4,

	},

	{
@@ -280,7 +282,9 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
			.board_size = QCA9377_BOARD_DATA_SZ,

			.board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,

		},

		.hw_ops = &qca988x_ops,

		.hw_ops = &qca6174_ops,

		.hw_clk = qca6174_clk,

		.target_cpu_freq = 176000000,

		.decap_align_bytes = 4,

	},

	{