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Commit cc9f328f authored by Saranya Chidura's avatar Saranya Chidura Committed by Gerrit - the friendly Code Review server
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soc: qcom: dcc_v2: add clocks support in probe 



DCC_CLK is to be voted from HLOS for the successful
device registration. Add the clock enable in dcc driver.

Change-Id: I869a957dcc7f8f4da67191e96db1c14fbde4941b
Signed-off-by: default avatarSaranya Chidura <schidura@codeaurora.org>
parent 6311fc48

drivers/soc/qcom/dcc_v2.c

+13 −0
Original line number Diff line number Diff line
@@ -23,6 +23,8 @@ 
#include <soc/qcom/memory_dump.h>

#include <soc/qcom/scm.h>

#include <dt-bindings/soc/qcom,dcc_v2.h>

#include <linux/clk.h>

#include <dt-bindings/clock/qcom,aop-qmp.h>



#define TIMEOUT_US		(100)
@@ -1549,6 +1551,7 @@ static int dcc_probe(struct platform_device *pdev) 
	struct dcc_drvdata *drvdata;

	struct resource *res;

	const char *data_sink;

	struct clk *pclk;



	drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);

	if (!drvdata)
@@ -1557,6 +1560,16 @@ static int dcc_probe(struct platform_device *pdev) 
	drvdata->dev = &pdev->dev;

	platform_set_drvdata(pdev, drvdata);



	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dcc_clk");

	if (res) {

		pclk = devm_clk_get(dev, "dcc_clk");

		if (!IS_ERR(pclk)) {

			ret = clk_set_rate(pclk, QDSS_CLK_LEVEL_DYNAMIC);

			if (ret)

				dev_err(dev, "clk set rate failed\n");

		}

	}



	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dcc-base");

	if (!res)

		return -EINVAL;