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Commit cbc33a90 authored by Joerg Roedel's avatar Joerg Roedel
Browse files

iommu/amd: Enable GT mode when supported by IOMMU



This feature needs to be enabled before IOMMUv2 DTEs can be
set up.

Signed-off-by: default avatarJoerg Roedel <joerg.roedel@amd.com>
parent 1a29ac01
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+9 −0
Original line number Diff line number Diff line
@@ -623,6 +623,14 @@ static void __init free_ppr_log(struct amd_iommu *iommu)
	free_pages((unsigned long)iommu->ppr_log, get_order(PPR_LOG_SIZE));
}

static void iommu_enable_gt(struct amd_iommu *iommu)
{
	if (!iommu_feature(iommu, FEATURE_GT))
		return;

	iommu_feature_enable(iommu, CONTROL_GT_EN);
}

/* sets a specific bit in the device table entry. */
static void set_dev_entry_bit(u16 devid, u8 bit)
{
@@ -1338,6 +1346,7 @@ static void enable_iommus(void)
		iommu_enable_command_buffer(iommu);
		iommu_enable_event_buffer(iommu);
		iommu_enable_ppr_log(iommu);
		iommu_enable_gt(iommu);
		iommu_set_exclusion_range(iommu);
		iommu_init_msi(iommu);
		iommu_enable(iommu);
+1 −0
Original line number Diff line number Diff line
@@ -129,6 +129,7 @@
#define CONTROL_PPFLOG_EN       0x0dULL
#define CONTROL_PPFINT_EN       0x0eULL
#define CONTROL_PPR_EN          0x0fULL
#define CONTROL_GT_EN           0x10ULL

/* command specific defines */
#define CMD_COMPL_WAIT          0x01