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Commit cbb8c328 authored by Deepak Katragadda's avatar Deepak Katragadda
Browse files

clk: qcom: gcc-sdm855: Place a proxy vote on the MMCX rail 



On SDM855, due to dependencies on the MMCX rail for turning on
the multimedia AHB clocks and subsequently accessing the display,
camera, and video CC registers, a proxy vote needs to be placed
from the GCC clock driver at probe. This ensures that the
multimedia CC registers are accessible from the respective clock
drivers. At late_initcall_sync, this vote is taken away and the
onus falls on clients to correctly enable their GDSCs or VDD_MMCX
prior to making any clock controller requests.

Change-Id: Ic907cc0ad5adda98ac59a66d8025cfecbc827358
Signed-off-by: default avatarDeepak Katragadda <dkatraga@codeaurora.org>
parent 28bb5f16

Documentation/devicetree/bindings/clock/qcom,gcc.txt

+1 −0
Original line number Diff line number Diff line
@@ -26,6 +26,7 @@ Required properties : 


Optional properties :

- #power-domain-cells : shall contain 1

- vdd_<rail>-supply: The logic rail supply.

- Qualcomm TSENS (thermal sensor device) on some devices can

be part of GCC and hence the TSENS properties can also be

part of the GCC/clock-controller node.

arch/arm64/boot/dts/qcom/sdm855.dtsi

+1 −0
Original line number Diff line number Diff line
@@ -708,6 +708,7 @@ 
		reg-names = "cc_base";

		vdd_cx-supply = <&pm855l_s6_level>;

		vdd_cx_ao-supply = <&pm855l_s6_level_ao>;

		vdd_mm-supply = <&pm855l_s5_level>;

		#clock-cells = <1>;

		#reset-cells = <1>;

	};

drivers/clk/qcom/gcc-sdm855.c

+19 −0
Original line number Diff line number Diff line
@@ -46,6 +46,7 @@ 


static DEFINE_VDD_REGULATORS(vdd_cx, VDD_NUM, 1, vdd_corner);

static DEFINE_VDD_REGULATORS(vdd_cx_ao, VDD_NUM, 1, vdd_corner);

static DEFINE_VDD_REGULATORS(vdd_mm, VDD_NUM, 1, vdd_corner);



enum {

	P_AUD_REF_CLK,
@@ -252,6 +253,16 @@ static struct clk_dummy measure_only_ipa_2x_clk = { 
	},

};



/* Only used to cast a vote on the MMCX rail until late_initcall_sync */

static struct clk_dummy mmcx_clk = {

	.rrate = 1000,

	.hw.init = &(struct clk_init_data){

		.name = "mmcx_clk",

		.ops = &clk_dummy_ops,

		.vdd_class = &vdd_mm,

	},

};



static struct pll_vco trion_vco[] = {

	{ 249600000, 2000000000, 0 },

};
@@ -4147,6 +4158,7 @@ struct clk_hw *gcc_sdm855_hws[] = { 
	[MEASURE_ONLY_CNOC_CLK] = &measure_only_cnoc_clk.hw,

	[MEASURE_ONLY_BIMC_CLK] = &measure_only_bimc_clk.hw,

	[MEASURE_ONLY_IPA_2X_CLK] = &measure_only_ipa_2x_clk.hw,

	[MMCX_CLK] = &mmcx_clk.hw,

};



static struct clk_regmap *gcc_sdm855_clocks[] = {
@@ -4479,6 +4491,13 @@ static int gcc_sdm855_probe(struct platform_device *pdev) 
	regmap_update_bits(regmap, GCC_NPU_MISC, 0x3, 0x3);

	regmap_update_bits(regmap, GCC_GPU_MISC, 0x3, 0x3);



	vdd_mm.regulator[0] = devm_regulator_get(&pdev->dev, "vdd_mm");

	if (IS_ERR(vdd_mm.regulator[0])) {

		if (!(PTR_ERR(vdd_mm.regulator[0]) == -EPROBE_DEFER))

			dev_err(&pdev->dev, "Unable to get vdd_mm regulator\n");

		return PTR_ERR(vdd_mm.regulator[0]);

	}



	/* register hardware clocks */

	for (i = 0; i < ARRAY_SIZE(gcc_sdm855_hws); i++) {

		clk = devm_clk_register(&pdev->dev, gcc_sdm855_hws[i]);

include/dt-bindings/clock/qcom,gcc-sdm855.h

+1 −0
Original line number Diff line number Diff line
@@ -261,5 +261,6 @@ 
#define MEASURE_ONLY_CNOC_CLK					1

#define MEASURE_ONLY_BIMC_CLK					2

#define MEASURE_ONLY_IPA_2X_CLK					3

#define MMCX_CLK						4



#endif