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Commit cb88214d authored by Sascha Hauer's avatar Sascha Hauer
Browse files

[ARM] MX31/MX35: Add l2x0 cache support 



Signed-off-by: default avatarSascha Hauer <s.hauer@pengutronix.de>
parent 9536ff33

arch/arm/mach-mx3/mm.c

+26 −1
Original line number Diff line number Diff line
@@ -22,10 +22,14 @@ 


#include <linux/mm.h>

#include <linux/init.h>

#include <mach/hardware.h>

#include <linux/err.h>



#include <asm/pgtable.h>

#include <asm/mach/map.h>

#include <asm/hardware/cache-l2x0.h>



#include <mach/common.h>

#include <mach/hardware.h>



/*!

 * @file mm.c
@@ -62,3 +66,24 @@ void __init mxc_map_io(void) 
{

	iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));

}



#ifdef CONFIG_CACHE_L2X0

static int mxc_init_l2x0(void)

{

	void __iomem *l2x0_base;



	l2x0_base = ioremap(L2CC_BASE_ADDR, 4096);

	if (IS_ERR(l2x0_base)) {

		printk(KERN_ERR "remapping L2 cache area failed with %ld\n",

				PTR_ERR(l2x0_base));

		return 0;

	}



	l2x0_init(l2x0_base, 0x00030024, 0x00000000);



	return 0;

}



arch_initcall(mxc_init_l2x0);

#endif

arch/arm/mm/Kconfig

+2 −1
Original line number Diff line number Diff line
@@ -704,7 +704,8 @@ config CACHE_FEROCEON_L2_WRITETHROUGH 


config CACHE_L2X0

	bool "Enable the L2x0 outer cache controller"

	depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 || REALVIEW_EB_A9MP

	depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 || \

		   REALVIEW_EB_A9MP || ARCH_MX35 || ARCH_MX31

	default y

	select OUTER_CACHE

	help