Merge "ARM: dts: msm: Add EMAC, USB3 and PCIE master/slave nodes for qcs405" (c971eb98) · Commits · e / devices / android_kernel_oneplus_sm8150

arch/arm64/boot/dts/qcom/qcs405-bus.dtsi

+98 −16

Original line number	Diff line number	Diff line
		@@ -172,8 +172,9 @@
		qcom,bus-dev = <&fab_pcnoc>;
		qcom,mas-rpm-id = <ICBID_MASTER_XI_USB_HS1>;
		qcom,blacklist = <&pcnoc_s_0 &pcnoc_s_1 &pcnoc_s_10
		&pcnoc_s_2 &pcnoc_s_4 &pcnoc_s_6
		&pcnoc_s_7 &pcnoc_s_8 &pcnoc_s_9>;
		&pcnoc_s_11 &pcnoc_s_2 &pcnoc_s_4
		&pcnoc_s_6 &pcnoc_s_7 &pcnoc_s_8
		&pcnoc_s_9>;
		};

		mas_crypto: mas-crypto {
		@@ -186,8 +187,9 @@
		qcom,bus-dev = <&fab_pcnoc>;
		qcom,mas-rpm-id = <ICBID_MASTER_CRYPTO_CORE0>;
		qcom,blacklist = <&pcnoc_s_0 &pcnoc_s_1 &pcnoc_s_10
		&pcnoc_s_2 &pcnoc_s_4 &pcnoc_s_6
		&pcnoc_s_7 &pcnoc_s_8 &pcnoc_s_9>;
		&pcnoc_s_11 &pcnoc_s_2 &pcnoc_s_4
		&pcnoc_s_6 &pcnoc_s_7 &pcnoc_s_8
		&pcnoc_s_9>;
		};

		mas_sdcc_1: mas-sdcc-1 {
		@@ -199,8 +201,9 @@
		qcom,bus-dev = <&fab_pcnoc>;
		qcom,mas-rpm-id = <ICBID_MASTER_SDCC_1>;
		qcom,blacklist = <&pcnoc_s_0 &pcnoc_s_1 &pcnoc_s_10
		&pcnoc_s_2 &pcnoc_s_4 &pcnoc_s_6
		&pcnoc_s_7 &pcnoc_s_8 &pcnoc_s_9>;
		&pcnoc_s_11 &pcnoc_s_2 &pcnoc_s_4
		&pcnoc_s_6 &pcnoc_s_7 &pcnoc_s_8
		&pcnoc_s_9>;
		};

		mas_sdcc_2: mas-sdcc-2 {
		@@ -212,8 +215,9 @@
		qcom,bus-dev = <&fab_pcnoc>;
		qcom,mas-rpm-id = <ICBID_MASTER_SDCC_2>;
		qcom,blacklist = <&pcnoc_s_0 &pcnoc_s_1 &pcnoc_s_10
		&pcnoc_s_2 &pcnoc_s_4 &pcnoc_s_6
		&pcnoc_s_7 &pcnoc_s_8 &pcnoc_s_9>;
		&pcnoc_s_11 &pcnoc_s_2 &pcnoc_s_4
		&pcnoc_s_6 &pcnoc_s_7 &pcnoc_s_8
		&pcnoc_s_9>;
		};

		mas_snoc_pcnoc: mas-snoc-pcnoc {
		@@ -240,8 +244,9 @@
		qcom,bus-dev = <&fab_pcnoc>;
		qcom,mas-rpm-id = <ICBID_MASTER_QPIC>;
		qcom,blacklist = <&pcnoc_s_0 &pcnoc_s_1 &pcnoc_s_10
		&pcnoc_s_2 &pcnoc_s_4 &pcnoc_s_6
		&pcnoc_s_7 &pcnoc_s_8 &pcnoc_s_9>;
		&pcnoc_s_11 &pcnoc_s_2 &pcnoc_s_4
		&pcnoc_s_6 &pcnoc_s_7 &pcnoc_s_8
		&pcnoc_s_9>;
		};

		/SNOC Masters/
		@@ -297,6 +302,51 @@
		qcom,mas-rpm-id = <ICBID_MASTER_QDSS_ETR>;
		};

		mas_emac: mas-emac {
		cell-id = <MSM_BUS_MASTER_EMAC>;
		label = "mas-emac";
		qcom,buswidth = <8>;
		qcom,agg-ports = <1>;
		qcom,ap-owned;
		qcom,qport = <27>;
		qcom,qos-mode = "fixed";
		qcom,connections = <&slv_snoc_bimc_1 &snoc_int_1>;
		qcom,prio1 = <1>;
		qcom,prio0 = <1>;
		qcom,bus-dev = <&fab_snoc>;
		qcom,mas-rpm-id = <ICBID_MASTER_EMAC>;
		};

		mas_pcie: mas-pcie {
		cell-id = <MSM_BUS_MASTER_PCIE>;
		label = "mas-pcie";
		qcom,buswidth = <8>;
		qcom,agg-ports = <1>;
		qcom,ap-owned;
		qcom,qport = <18>;
		qcom,qos-mode = "fixed";
		qcom,connections = <&slv_snoc_bimc_1 &snoc_int_1>;
		qcom,prio1 = <1>;
		qcom,prio0 = <1>;
		qcom,bus-dev = <&fab_snoc>;
		qcom,mas-rpm-id = <ICBID_MASTER_PCIE_0>;
		};

		mas_usb3: mas-usb3 {
		cell-id = <MSM_BUS_MASTER_USB3>;
		label = "mas-usb3";
		qcom,buswidth = <8>;
		qcom,agg-ports = <1>;
		qcom,ap-owned;
		qcom,qport = <26>;
		qcom,qos-mode = "fixed";
		qcom,connections = <&slv_snoc_bimc_1 &snoc_int_1>;
		qcom,prio1 = <1>;
		qcom,prio0 = <1>;
		qcom,bus-dev = <&fab_snoc>;
		qcom,mas-rpm-id = <ICBID_MASTER_USB3>;
		};

		/Internal nodes/
		pcnoc_int_0: pcnoc-int-0 {
		cell-id = <MSM_BUS_PNOC_INT_0>;
		@@ -314,7 +364,8 @@
		label = "pcnoc-int-2";
		qcom,buswidth = <8>;
		qcom,agg-ports = <1>;
		qcom,connections = <&pcnoc_s_10 &slv_tcu &pcnoc_s_2
		qcom,connections = <&pcnoc_s_10 &slv_tcu
		&pcnoc_s_11 &pcnoc_s_2
		&pcnoc_s_3 &pcnoc_s_0
		&pcnoc_s_1 &pcnoc_s_6
		&pcnoc_s_7 &pcnoc_s_4
		@@ -396,7 +447,8 @@
		label = "pcnoc-s-6";
		qcom,buswidth = <4>;
		qcom,agg-ports = <1>;
		qcom,connections = <&slv_blsp_1 &slv_tlmm_north>;
		qcom,connections = <&slv_blsp_1 &slv_tlmm_north
		&slv_ethernet>;
		qcom,bus-dev = <&fab_pcnoc>;
		qcom,mas-rpm-id = <ICBID_MASTER_PCNOC_S_6>;
		qcom,slv-rpm-id = <ICBID_SLAVE_PCNOC_S_6>;
		@@ -448,6 +500,17 @@
		qcom,slv-rpm-id = <ICBID_SLAVE_PCNOC_S_10>;
		};

		pcnoc_s_11: pcnoc-s-11 {
		cell-id = <MSM_BUS_PNOC_SLV_11>;
		label = "pcnoc-s-11";
		qcom,buswidth = <4>;
		qcom,agg-ports = <1>;
		qcom,connections = <&slv_usb3>;
		qcom,bus-dev = <&fab_pcnoc>;
		qcom,mas-rpm-id = <ICBID_MASTER_PCNOC_S_11>;
		qcom,slv-rpm-id = <ICBID_SLAVE_PCNOC_S_11>;
		};

		qdss_int: qdss-int {
		cell-id = <MSM_BUS_SNOC_QDSS_INT>;
		label = "qdss-int";
		@@ -617,6 +680,16 @@
		qcom,slv-rpm-id = <ICBID_SLAVE_PCIE_1>;
		};

		slv_ethernet:slv-ethernet {
		cell-id = <MSM_BUS_SLAVE_EMAC_CFG>;
		label = "slv-ethernet";
		qcom,buswidth = <4>;
		qcom,agg-ports = <1>;
		qcom,ap-owned;
		qcom,bus-dev = <&fab_pcnoc>;
		qcom,slv-rpm-id = <ICBID_SLAVE_EMAC>;
		};

		slv_blsp_2:slv-blsp-2 {
		cell-id = <MSM_BUS_SLAVE_BLSP_2>;
		label = "slv-blsp-2";
		@@ -690,6 +763,15 @@
		qcom,slv-rpm-id = <ICBID_SLAVE_USB_HS>;
		};

		slv_usb3:slv-usb3 {
		cell-id = <MSM_BUS_SLAVE_USB3>;
		label = "slv-usb3";
		qcom,buswidth = <4>;
		qcom,agg-ports = <1>;
		qcom,bus-dev = <&fab_pcnoc>;
		qcom,slv-rpm-id = <ICBID_SLAVE_USB3>;
		};

		slv_crypto_0_cfg:slv-crypto-0-cfg {
		cell-id = <MSM_BUS_SLAVE_CRYPTO_0_CFG>;
		label = "slv-crypto-0-cfg";

include/dt-bindings/msm/msm-bus-ids.h

+45 −2

Original line number	Diff line number	Diff line
		@@ -363,6 +363,7 @@
		#define MSM_BUS_SLAVE_SNOC_GEM_NOC_GC 10072
		#define MSM_BUS_SLAVE_SNOC_GEM_NOC_SF 10073
		#define MSM_BUS_PNOC_SLV_10 10074
		#define MSM_BUS_PNOC_SLV_11 10075

		#define MSM_BUS_INT_TEST_ID 20000
		#define MSM_BUS_INT_TEST_LAST 20050
		@@ -822,7 +823,19 @@
		#define ICBID_MASTER_CNOC_A2NOC 146
		#define ICBID_MASTER_WLAN 147
		#define ICBID_MASTER_MSS_CE 148
		#define ICBID_MASTER_PCNOC_S_10 149
		#define ICBID_MASTER_CDSP_PROC 149
		#define ICBID_MASTER_GNOC_SNOC 150
		#define ICBID_MASTER_MODEM_WRAPPER 151
		#define ICBID_MASTER_SDIO 152
		#define ICBID_MASTER_BIMC_SNOC_PCIE 153
		#define ICBID_MASTER_WLAN_PROC 154
		#define ICBID_MASTER_CRVIRT_PCNOC 155
		#define ICBID_MASTER_WLAN_INT 156
		#define ICBID_MASTER_PCNOC_S_10 157
		#define ICBID_MASTER_PCNOC_S_11 158
		#define ICBID_MASTER_LPASS_LPAIF 159
		#define ICBID_MASTER_LPASS_LEC 160
		#define ICBID_MASTER_LPASS_ANOC_BIMC 161

		#define ICBID_SLAVE_EBI1 0
		#define ICBID_SLAVE_APPSS_L2 1
		@@ -1052,5 +1065,35 @@
		#define ICBID_SLAVE_TLMM_NORTH 214
		#define ICBID_SLAVE_TLMM_WEST 215
		#define ICBID_SLAVE_TLMM_SOUTH 216
		#define ICBID_SLAVE_PCNOC_S_10 217
		#define ICBID_SLAVE_TLMM_CENTER 217
		#define ICBID_SLAVE_MSS_NAV_CE_MPU_CFG 218
		#define ICBID_SLAVE_A2NOC_THROTTLE_CFG 219
		#define ICBID_SLAVE_CDSP 220
		#define ICBID_SLAVE_CDSP_SMMU_CFG 221
		#define ICBID_SLAVE_LPASS_MPU_CFG 222
		#define ICBID_SLAVE_CSI_PHY_CFG 223
		#define ICBID_SLAVE_DDRSS_CFG 224
		#define ICBID_SLAVE_DDRSS_MPU_CFG 225
		#define ICBID_SLAVE_SNOC_MSS_XPU_CFG 226
		#define ICBID_SLAVE_BIMC_MSS_XPU_CFG 227
		#define ICBID_SLAVE_MSS_SNOC_MPU_CFG 228
		#define ICBID_SLAVE_MSS 229
		#define ICBID_SLAVE_SDIO 230
		#define ICBID_SLAVE_QM_MPU_CFG 231
		#define ICBID_SLAVE_BIMC_SNOC_PCIE 232
		#define ICBID_SLAVE_BOOTIMEM 233
		#define ICBID_SLAVE_CDSP_CFG 234
		#define ICBID_SLAVE_WLAN_DSP_CFG 235
		#define ICBID_SLAVE_GENIR_XPU_CFG 236
		#define ICBID_SLAVE_BOOTIMEM_MPU 237
		#define ICBID_SLAVE_CRVIRT_PCNOC 238
		#define ICBID_SLAVE_WLAN_INT 239
		#define ICBID_SLAVE_WLAN_MPU_CFG 240
		#define ICBID_SLAVE_LPASS_AGNOC_CFG 241
		#define ICBID_SLAVE_LPASS_AGNOC_XPU_CFG 242
		#define ICBID_SLAVE_PLL_BIAS_CFG 243
		#define ICBID_SLAVE_EMAC 244
		#define ICBID_SLAVE_PCNOC_S_10 245
		#define ICBID_SLAVE_PCNOC_S_11 246
		#define ICBID_SLAVE_LPASS_ANOC_BIMC 247
		#endif