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Commit c9395a83 authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge changes I21f7707a,I71c0a624,I05b8882f into msm-next 

* changes:
  ARM: dts: msm: Update and enable the clock_npucc node on SDM855
  defconfig: msm: Enable the NPUCC clock driver for SDM855
  clk: qcom: Add the NPUCC clock driver for SDM855
parents 12252c17 88c81cd1

Documentation/devicetree/bindings/clock/qcom,npucc.txt

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Qualcomm Technologies, Inc. NPU Clock & Reset Controller Binding

----------------------------------------------------------------



Required properties :

- compatible : must contain "qcom,npucc-sdm855".

- reg : shall contain base register location and length.

- reg-names: names of registers listed in the same order as in

	     the reg property.

- #clock-cells : shall contain 1.

- #reset-cells : shall contain 1.



Optional properties :

- vdd_<rail>-supply: The logic rail supply.



Example:

	clock_npucc: qcom,npucc {

		compatible = "qcom,npucc-sdm855";

		reg = <0x9910000 0x10000>;

		reg-names = "cc_base";

		vdd_cx-supply = <&pm855l_s6_level>;

		#clock-cells = <1>;

		#reset-cells = <1>;

	};

arch/arm64/boot/dts/qcom/sdm855.dtsi

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@@ -554,8 +554,10 @@ 
	};



	clock_npucc: qcom,npucc {

		compatible = "qcom,dummycc";

		clock-output-names = "npucc_clocks";

		compatible = "qcom,npucc-sdm855";

		reg = <0x9910000 0x10000>;

		reg-names = "cc_base";

		vdd_cx-supply = <&pm855l_s6_level>;

		#clock-cells = <1>;

		#reset-cells = <1>;

	};

arch/arm64/configs/sdm855-perf_defconfig

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@@ -317,6 +317,7 @@ CONFIG_ASHMEM=y 
CONFIG_ION=y

CONFIG_ION_MSM=y

CONFIG_MSM_GCC_SDM855=y

CONFIG_MSM_NPUCC_SDM855=y

CONFIG_HWSPINLOCK=y

CONFIG_HWSPINLOCK_QCOM=y

CONFIG_MAILBOX=y

arch/arm64/configs/sdm855_defconfig

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@@ -327,6 +327,7 @@ CONFIG_ASHMEM=y 
CONFIG_ION=y

CONFIG_ION_MSM=y

CONFIG_MSM_GCC_SDM855=y

CONFIG_MSM_NPUCC_SDM855=y

CONFIG_HWSPINLOCK=y

CONFIG_HWSPINLOCK_QCOM=y

CONFIG_MAILBOX=y

drivers/clk/qcom/Kconfig

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@@ -214,3 +214,11 @@ config MSM_GCC_SDM855 
	  SDM855 devices.

	  Say Y if you want to use peripheral devices such as UART, SPI, i2c,

	  USB, UFS, SD/eMMC, PCIe, etc.



config MSM_NPUCC_SDM855

	tristate "SDM855 NPU Clock Controller"

	depends on COMMON_CLK_QCOM

	help

          Support for the NPU clock controller on Qualcomm Technologies, Inc

	  SDM855 devices.

	  Say Y if you want to enable use of the Network Processing Unit.