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Commit c8eb35be authored by Jayant Shekhar's avatar Jayant Shekhar
Browse files

drm/msm/dsi-staging: Fix pclk for command mode panel 



Correct pclk for command mode panel using correct transfer
time value.

Change-Id: I34ac2ef7fa51909acdf1ae24195443d98055692c
Signed-off-by: default avatarJayant Shekhar <jshekhar@codeaurora.org>
parent 92f4c23f

drivers/gpu/drm/msm/dsi-staging/dsi_panel.c

+1 −1
Original line number Diff line number Diff line
@@ -2469,7 +2469,7 @@ static int dsi_panel_parse_phy_timing(struct dsi_display_mode *mode, 
	if (panel_mode == DSI_OP_CMD_MODE) {

		h_period = DSI_H_ACTIVE_DSC(timing);

		v_period = timing->v_active;

		do_div(refresh_rate, timing->mdp_transfer_time_us);

		do_div(refresh_rate, priv_info->mdp_transfer_time_us);

	} else {

		h_period = DSI_H_TOTAL_DSC(timing);

		v_period = DSI_V_TOTAL(timing);