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Commit c8cd534a authored by Taniya Das's avatar Taniya Das Committed by Gerrit - the friendly Code Review server
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clk: qcom: clk-cpu-qcs405: Reorg the CPU clock code 



As the APCS cmd & pll is using the same regmap config to register with
regmap framework it fails to create the debugfs directory. Associate a name
with the regmap config for each. While at it get the regulator handles
from DT before doing a regmap. Also clean up the rcu_read_lock/unlock as
they are not required.

Change-Id: I54cad03a4c5e22a0739ca73fb3a0a908197401f9
Signed-off-by: default avatarTaniya Das <tdas@codeaurora.org>
parent a5861b7c

drivers/clk/qcom/clk-cpu-qcs405.c

+21 −22
Original line number Diff line number Diff line
@@ -299,7 +299,7 @@ static const struct of_device_id match_table[] = { 
	{}

};



static const struct regmap_config cpu_regmap_config = {

static struct regmap_config cpu_regmap_config = {

	.reg_bits	= 32,

	.reg_stride	= 4,

	.val_bits	= 32,
@@ -477,8 +477,6 @@ static void cpucc_clk_print_opp_table(int cpu) 
	apc_fmax = apcs_mux_clk.clkr.hw.init->rate_max[max_cpuss_index - 1];

	apc_fmin = apcs_mux_clk.clkr.hw.init->rate_max[1];



	rcu_read_lock();



	oppfmax = dev_pm_opp_find_freq_exact(get_cpu_device(cpu),

					apc_fmax, true);

	oppfmin = dev_pm_opp_find_freq_exact(get_cpu_device(cpu),
@@ -488,7 +486,6 @@ static void cpucc_clk_print_opp_table(int cpu) 
	pr_info("Clock_cpu:(cpu %d) OPP voltage for %lu: %ld\n", cpu, apc_fmax,

		dev_pm_opp_get_voltage(oppfmax));



	rcu_read_unlock();

}



static void cpucc_clk_populate_opp_table(struct platform_device *pdev)
@@ -535,6 +532,24 @@ static int cpucc_driver_probe(struct platform_device *pdev) 
		return PTR_ERR(clk);

	}



	 /* Rail Regulator for apcs_pll */

	vdd_cx.regulator[0] = devm_regulator_get(&pdev->dev, "vdd_dig_ao");

	if (IS_ERR(vdd_cx.regulator[0])) {

		if (!(PTR_ERR(vdd_cx.regulator[0]) == -EPROBE_DEFER))

			dev_err(&pdev->dev,

				"Unable to get vdd_dig_ao regulator\n");

		return PTR_ERR(vdd_cx.regulator[0]);

	}



	/* Rail Regulator for APSS cpuss mux */

	vdd_cpu.regulator[0] = devm_regulator_get(&pdev->dev, "cpu-vdd");

	if (IS_ERR(vdd_cpu.regulator[0])) {

		if (!(PTR_ERR(vdd_cpu.regulator[0]) == -EPROBE_DEFER))

			dev_err(&pdev->dev,

				"Unable to get cpu-vdd regulator\n");

		return PTR_ERR(vdd_cpu.regulator[0]);

	}



	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "apcs_pll");

	base = devm_ioremap_resource(dev, res);

	if (IS_ERR(base)) {
@@ -542,6 +557,7 @@ static int cpucc_driver_probe(struct platform_device *pdev) 
		return PTR_ERR(base);

	}



	cpu_regmap_config.name = "apcs_pll";

	apcs_cpu_pll.clkr.regmap = devm_regmap_init_mmio(dev, base,

							&cpu_regmap_config);

	if (IS_ERR(apcs_cpu_pll.clkr.regmap)) {
@@ -556,6 +572,7 @@ static int cpucc_driver_probe(struct platform_device *pdev) 
		return PTR_ERR(base);

	}



	cpu_regmap_config.name = "apcs_cmd";

	apcs_mux_clk.clkr.regmap = devm_regmap_init_mmio(dev, base,

							&cpu_regmap_config);

	if (IS_ERR(apcs_mux_clk.clkr.regmap)) {
@@ -563,24 +580,6 @@ static int cpucc_driver_probe(struct platform_device *pdev) 
		return PTR_ERR(apcs_mux_clk.clkr.regmap);

	}



	 /* Rail Regulator for apcs_pll */

	vdd_cx.regulator[0] = devm_regulator_get(&pdev->dev, "vdd_dig_ao");

	if (IS_ERR(vdd_cx.regulator[0])) {

		if (!(PTR_ERR(vdd_cx.regulator[0]) == -EPROBE_DEFER))

			dev_err(&pdev->dev,

				"Unable to get vdd_dig_ao regulator\n");

		return PTR_ERR(vdd_cx.regulator[0]);

	}



	/* Rail Regulator for APSS cpuss mux */

	vdd_cpu.regulator[0] = devm_regulator_get(&pdev->dev, "cpu-vdd");

	if (IS_ERR(vdd_cpu.regulator[0])) {

		if (!(PTR_ERR(vdd_cpu.regulator[0]) == -EPROBE_DEFER))

			dev_err(&pdev->dev,

				"Unable to get cpu-vdd regulator\n");

		return PTR_ERR(vdd_cpu.regulator[0]);

	}



	/* Get speed bin information */

	cpucc_clk_get_speed_bin(pdev, &speed_bin, &version);