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Commit c8584039 authored by Michel Dänzer's avatar Michel Dänzer Committed by Alex Deucher
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drm/radeon: Add RADEON_GEM_CPU_ACCESS BO creation flag



This flag is a hint that userspace expects the BO to be accessed by the
CPU. We can use that hint to prevent such BOs from ever being stored in
the CPU inaccessible part of VRAM.

Signed-off-by: default avatarMichel Dänzer <michel.daenzer@amd.com>
Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent fdcaa1db
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+9 −2
Original line number Diff line number Diff line
@@ -144,6 +144,11 @@ void radeon_ttm_placement_from_domain(struct radeon_bo *rbo, u32 domain)

	for (i = 0; i < c; ++i) {
		rbo->placements[i].fpfn = 0;
		if ((rbo->flags & RADEON_GEM_CPU_ACCESS) &&
		    (rbo->placements[i].flags & TTM_PL_FLAG_VRAM))
			rbo->placements[i].lpfn =
				rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT;
		else
			rbo->placements[i].lpfn = 0;
	}

@@ -152,7 +157,9 @@ void radeon_ttm_placement_from_domain(struct radeon_bo *rbo, u32 domain)
	 * improve fragmentation quality.
	 * 512kb was measured as the most optimal number.
	 */
	if (rbo->tbo.mem.size > 512 * 1024) {
	if (!((rbo->flags & RADEON_GEM_CPU_ACCESS) &&
	      (rbo->placements[i].flags & TTM_PL_FLAG_VRAM)) &&
	    rbo->tbo.mem.size > 512 * 1024) {
		for (i = 0; i < c; i++) {
			rbo->placements[i].flags |= TTM_PL_FLAG_TOPDOWN;
		}
+2 −0
Original line number Diff line number Diff line
@@ -801,6 +801,8 @@ struct drm_radeon_gem_info {
#define RADEON_GEM_NO_BACKING_STORE	(1 << 0)
#define RADEON_GEM_GTT_UC		(1 << 1)
#define RADEON_GEM_GTT_WC		(1 << 2)
/* BO is expected to be accessed by the CPU */
#define RADEON_GEM_CPU_ACCESS		(1 << 3)

struct drm_radeon_gem_create {
	uint64_t	size;