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Commit c7a6ed20 authored by Veera Sundaram Sankaran's avatar Veera Sundaram Sankaran
Browse files

drm/msm/sde: add parsing logic for sec_sid_mask 



Get the secure SID mask from device tree, so it can
be configured based on the target. The mask is used
during secure-camera/secure-display switch scm_call

Change-Id: Icdf35cb23287921f53d8f0fe01fe26133bf454e4
Signed-off-by: default avatarVeera Sundaram Sankaran <veeras@codeaurora.org>
parent 71de5a57

Documentation/devicetree/bindings/display/msm/sde.txt

+3 −0
Original line number Diff line number Diff line
@@ -405,6 +405,8 @@ Optional properties: 
				control register. Number of offsets defined should

				match the number of xin-ids defined in

				property: qcom,sde-inline-rot-xin

- qcom,sde-secure-sid-mask:	Array of secure SID masks used during

				secure-camera/secure-display usecases.

- #power-domain-cells:		Number of cells in a power-domain specifier and should contain 0.

- qcom,sde-mixer-display-pref:  A string array indicating the preferred display type

				for the mixer block. Possible values:
@@ -681,6 +683,7 @@ Example: 
    qcom,sde-max-per-pipe-bw-kbps = <2400000 2400000 2400000 2400000

        2400000 2400000 2400000 2400000>;

    qcom,sde-amortizable-threshold = <11>;

    qcom,sde-secure-sid-mask = <0x200801 0x200c01>;



    qcom,sde-vbif-qos-rt-remap = <3 3 4 4 5 5 6 6>;

    qcom,sde-vbif-qos-nrt-remap = <3 3 3 3 3 3 3 3>;

drivers/gpu/drm/msm/sde/sde_hw_catalog.c

+15 −1
Original line number Diff line number Diff line
@@ -167,6 +167,7 @@ enum sde_prop { 
	MACROTILE_MODE,

	UBWC_BW_CALC_VERSION,

	PIPE_ORDER_VERSION,

	SEC_SID_MASK,

	SDE_PROP_MAX,

};
@@ -442,6 +443,7 @@ static struct sde_prop_type sde_prop[] = { 
			PROP_TYPE_U32},

	{PIPE_ORDER_VERSION, "qcom,sde-pipe-order-version", false,

			PROP_TYPE_U32},

	{SEC_SID_MASK, "qcom,sde-secure-sid-mask", false, PROP_TYPE_U32_ARRAY},

};



static struct sde_prop_type sde_perf_prop[] = {
@@ -2861,7 +2863,7 @@ static int sde_pp_parse_dt(struct device_node *np, struct sde_mdss_cfg *sde_cfg) 


static int sde_parse_dt(struct device_node *np, struct sde_mdss_cfg *cfg)

{

	int rc, dma_rc, len, prop_count[SDE_PROP_MAX];

	int rc, i, dma_rc, len, prop_count[SDE_PROP_MAX];

	struct sde_prop_value *prop_value = NULL;

	bool prop_exists[SDE_PROP_MAX];

	const char *type;
@@ -2885,6 +2887,11 @@ static int sde_parse_dt(struct device_node *np, struct sde_mdss_cfg *cfg) 
	if (rc)

		goto end;



	rc = _validate_dt_entry(np, &sde_prop[SEC_SID_MASK], 1,

				&prop_count[SEC_SID_MASK], NULL);

	if (rc)

		goto end;



	rc = _read_dt_entry(np, sde_prop, ARRAY_SIZE(sde_prop), prop_count,

		prop_exists, prop_value);

	if (rc)
@@ -2960,6 +2967,13 @@ static int sde_parse_dt(struct device_node *np, struct sde_mdss_cfg *cfg) 
	if (major_version < SDE_HW_MAJOR(SDE_HW_VER_500))

		set_bit(SDE_MDP_VSYNC_SEL, &cfg->mdp[0].features);



	if (prop_exists[SEC_SID_MASK]) {

		cfg->sec_sid_mask_count = prop_count[SEC_SID_MASK];

		for (i = 0; i < cfg->sec_sid_mask_count; i++)

			cfg->sec_sid_mask[i] =

				PROP_VALUE_ACCESS(prop_value, SEC_SID_MASK, i);

	}



	rc = of_property_read_string(np, sde_prop[QSEED_TYPE].prop_name, &type);

	if (!rc && !strcmp(type, "qseedv3")) {

		cfg->qseed_type = SDE_SSPP_SCALER_QSEED3;

drivers/gpu/drm/msm/sde/sde_hw_catalog.h

+6 −0
Original line number Diff line number Diff line
@@ -1040,6 +1040,9 @@ struct sde_perf_cfg { 
 * @sui_misr_supported  indicate if secure-ui-misr is supported

 * @sui_block_xin_mask  mask of all the xin-clients to be blocked during

 *                         secure-ui when secure-ui-misr feature is supported

 * @sec_sid_mask_count  number of SID masks

 * @sec_sid_mask        SID masks used during the scm_call for transition

 *                         between secure/non-secure sessions

 */

struct sde_mdss_cfg {

	u32 hwversion;
@@ -1078,6 +1081,9 @@ struct sde_mdss_cfg { 
	bool sui_misr_supported;

	u32 sui_block_xin_mask;



	u32 sec_sid_mask_count;

	u32 sec_sid_mask[MAX_BLOCKS];



	bool has_hdr;

	u32 mdss_count;

	struct sde_mdss_base_cfg mdss[MAX_BLOCKS];

drivers/gpu/drm/msm/sde/sde_kms.c

+22 −20
Original line number Diff line number Diff line
@@ -53,9 +53,6 @@ 
#include "sde_trace.h"



/* defines for secure channel call */

#define SEC_SID_CNT               2

#define SEC_SID_MASK_0            0x80881

#define SEC_SID_MASK_1            0x80C81

#define MEM_PROTECT_SD_CTRL_SWITCH 0x18

#define MDP_DEVICE_ID            0x1A
@@ -444,31 +441,36 @@ static int _sde_kms_secure_ctrl_xin_clients(struct sde_kms *sde_kms, 


/**

 * _sde_kms_scm_call - makes secure channel call to switch the VMIDs

 * @vimd: switch the stage 2 translation to this VMID.

 * @sde_kms: Pointer to sde_kms struct

 * @vimd: switch the stage 2 translation to this VMID

 */

static int _sde_kms_scm_call(int vmid)

static int _sde_kms_scm_call(struct sde_kms *sde_kms, int vmid)

{

	struct scm_desc desc = {0};

	uint32_t num_sids;

	uint32_t *sec_sid;

	uint32_t mem_protect_sd_ctrl_id = MEM_PROTECT_SD_CTRL_SWITCH;

	int ret = 0;

	struct sde_mdss_cfg *sde_cfg = sde_kms->catalog;

	int ret = 0, i;



	num_sids = sde_cfg->sec_sid_mask_count;

	if (!num_sids) {

		SDE_ERROR("secure SID masks not configured, vmid 0x%x\n", vmid);

		return -EINVAL;

	}



	/* This info should be queried from catalog */

	num_sids = SEC_SID_CNT;

	sec_sid = kcalloc(num_sids, sizeof(uint32_t), GFP_KERNEL);

	if (!sec_sid)

		return -ENOMEM;



	/*

	 * derive this info from device tree/catalog, this is combination of

	 * smr mask and SID for secure

	 */

	sec_sid[0] = SEC_SID_MASK_0;

	sec_sid[1] = SEC_SID_MASK_1;

	for (i = 0; i < num_sids; i++) {

		sec_sid[i] = sde_cfg->sec_sid_mask[i];

		SDE_DEBUG("sid_mask[%d]: %d\n", i, sec_sid[i]);

	}

	dmac_flush_range(sec_sid, sec_sid + num_sids);



	SDE_DEBUG("calling scm_call for vmid %d", vmid);

	SDE_DEBUG("calling scm_call for vmid 0x%x, num_sids %d",

				vmid, num_sids);



	desc.arginfo = SCM_ARGS(4, SCM_VAL, SCM_RW, SCM_VAL, SCM_VAL);

	desc.args[0] = MDP_DEVICE_ID;
@@ -479,7 +481,7 @@ static int _sde_kms_scm_call(int vmid) 
	ret = scm_call2(SCM_SIP_FNID(SCM_SVC_MP,

				mem_protect_sd_ctrl_id), &desc);

	if (ret)

		SDE_ERROR("Error:scm_call2, vmid (%lld): ret%d\n",

		SDE_ERROR("Error:scm_call2, vmid %lld, ret%d\n",

				desc.args[3], ret);

	SDE_EVT32(mem_protect_sd_ctrl_id,

			desc.args[0], desc.args[3], num_sids,
@@ -503,7 +505,7 @@ static int _sde_kms_detach_all_cb(struct sde_kms *sde_kms) 
		goto end;

	}



	ret = _sde_kms_scm_call(VMID_CP_SEC_DISPLAY);

	ret = _sde_kms_scm_call(sde_kms, VMID_CP_SEC_DISPLAY);

	if (ret)

		goto end;
@@ -518,7 +520,7 @@ static int _sde_kms_attach_all_cb(struct sde_kms *sde_kms) 
	if (atomic_dec_return(&sde_kms->detach_all_cb) != 0)

		goto end;



	ret = _sde_kms_scm_call(VMID_CP_PIXEL);

	ret = _sde_kms_scm_call(sde_kms, VMID_CP_PIXEL);

	if (ret)

		goto end;
@@ -547,7 +549,7 @@ static int _sde_kms_detach_sec_cb(struct sde_kms *sde_kms) 
		goto end;

	}



	ret = _sde_kms_scm_call(VMID_CP_CAMERA_PREVIEW);

	ret = _sde_kms_scm_call(sde_kms, VMID_CP_CAMERA_PREVIEW);

	if (ret)

		goto end;
@@ -562,7 +564,7 @@ static int _sde_kms_attach_sec_cb(struct sde_kms *sde_kms) 
	if (atomic_dec_return(&sde_kms->detach_sec_cb) != 0)

		goto end;



	ret = _sde_kms_scm_call(VMID_CP_PIXEL);

	ret = _sde_kms_scm_call(sde_kms, VMID_CP_PIXEL);

	if (ret)

		goto end;