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Commit c713bb08 authored by Eric Anholt's avatar Eric Anholt Committed by Keith Packard
Browse files

drm/i915: Drop the eDP paths from the pre-Ironlake crtc_mode_set. 



While g4x had DP, eDP came with Ironlake, so we don't need that code here.

Signed-off-by: default avatarEric Anholt <eric@anholt.net>
Reviewed-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
parent 929c77fb

drivers/gpu/drm/i915/intel_display.c

+24 −33
Original line number Diff line number Diff line
@@ -4533,7 +4533,6 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc, 
	u32 dpll, fp = 0, fp2 = 0, dspcntr, pipeconf;

	bool ok, has_reduced_clock = false, is_sdvo = false, is_dvo = false;

	bool is_crt = false, is_lvds = false, is_tv = false, is_dp = false;

	struct intel_encoder *has_edp_encoder = NULL;

	struct drm_mode_config *mode_config = &dev->mode_config;

	struct intel_encoder *encoder;

	const intel_limit_t *limit;
@@ -4567,9 +4566,6 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc, 
		case INTEL_OUTPUT_DISPLAYPORT:

			is_dp = true;

			break;

		case INTEL_OUTPUT_EDP:

			has_edp_encoder = encoder;

			break;

		}



		num_connectors++;
@@ -4750,14 +4746,11 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc, 
	fp_reg = FP0(pipe);

	dpll_reg = DPLL(pipe);



	/* PCH eDP needs FDI, but CPU eDP does not */

	if (!has_edp_encoder) {

	I915_WRITE(fp_reg, fp);

	I915_WRITE(dpll_reg, dpll & ~DPLL_VCO_ENABLE);



	POSTING_READ(dpll_reg);

	udelay(150);

	}



	/* The LVDS pin pair needs to be on before the DPLLs are enabled.

	 * This is an exception to the general rule that mode_set doesn't turn
@@ -4817,7 +4810,6 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc, 
		intel_dp_set_m_n(crtc, mode, adjusted_mode);

	}



	if (!has_edp_encoder) {

	I915_WRITE(dpll_reg, dpll);



	/* Wait for the clocks to stabilize. */
@@ -4842,7 +4834,6 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc, 
		 */

		I915_WRITE(dpll_reg, dpll);

	}

	}



	intel_crtc->lowfreq_avail = false;

	if (is_lvds && has_reduced_clock && i915_powersave) {