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Commit c642a944 authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Add two wire UART support and correct irq mapping"

parents 709e9085 42e00217

arch/arm64/boot/dts/qcom/qcs405-blsp.dtsi

+10 −10
Original line number Diff line number Diff line
@@ -348,8 +348,8 @@ 
		interrupts = <0 1 2>;

		#interrupt-cells = <1>;

		interrupt-map-mask = <0xffffffff>;

		interrupt-map = <0 &intc 0 0 107 0

			    1 &intc 0 0 238 0

		interrupt-map = <0 &intc 0 107 0

			    1 &intc 0 238 0

			    2 &tlmm 31 0>;



		qcom,inject-rx-on-wakeup;
@@ -385,8 +385,8 @@ 
		interrupts = <0 1 2>;

		#interrupt-cells = <1>;

		interrupt-map-mask = <0xffffffff>;

		interrupt-map = <0 &intc 0 0 108 0

			    1 &intc 0 0 238 0

		interrupt-map = <0 &intc 0 108 0

			    1 &intc 0 238 0

			    2 &tlmm 23 0>;



		qcom,inject-rx-on-wakeup;
@@ -422,8 +422,8 @@ 
		interrupts = <0 1 2>;

		#interrupt-cells = <1>;

		interrupt-map-mask = <0xffffffff>;

		interrupt-map = <0 &intc 0 0 118 0

			    1 &intc 0 0 238 0

		interrupt-map = <0 &intc 0 118 0

			    1 &intc 0 238 0

			    2 &tlmm 18 0>;



		qcom,inject-rx-on-wakeup;
@@ -459,8 +459,8 @@ 
		interrupts = <0 1 2>;

		#interrupt-cells = <1>;

		interrupt-map-mask = <0xffffffff>;

		interrupt-map = <0 &intc 0 0 119 0

			    1 &intc 0 0 238 0

		interrupt-map = <0 &intc 0 119 0

			    1 &intc 0 238 0

			    2 &tlmm 83 0>;



		qcom,inject-rx-on-wakeup;
@@ -498,8 +498,8 @@ 
		interrupts = <0 1 2>;

		#interrupt-cells = <1>;

		interrupt-map-mask = <0xffffffff>;

		interrupt-map = <0 &intc 0 0 297 0

			    1 &intc 0 0 239 0

		interrupt-map = <0 &intc 0 297 0

			    1 &intc 0 239 0

			    2 &tlmm 27 0>;



		qcom,inject-rx-on-wakeup;

arch/arm64/boot/dts/qcom/qcs405-pinctrl.dtsi

+4 −8
Original line number Diff line number Diff line
@@ -85,14 +85,12 @@ 
		blsp1_uart2 {

			blsp1_uart2_active: blsp1_uart2_active {

				mux {

					pins = "gpio22", "gpio23",

						"gpio24", "gpio25";

					pins = "gpio22", "gpio23";

					function = "blsp_uart1";

				};



				config {

					pins = "gpio22", "gpio23",

						"gpio24", "gpio25";

					pins = "gpio22", "gpio23";

					drive-strength = <2>;

					bias-disable;

				};
@@ -100,14 +98,12 @@ 


			blsp1_uart2_sleep: blsp1_uart2_sleep {

				mux {

					pins = "gpio22", "gpio23",

						"gpio24", "gpio25";

					pins = "gpio22", "gpio23";

					function = "gpio";

				};



				config {

					pins = "gpio22", "gpio23",

						"gpio24", "gpio25";

					pins = "gpio22", "gpio23";

					drive-strength = <2>;

					bias-disable;

				};