Merge branch 'sh/clkfwk' (c5eb5b37) · Commits · e / devices / android_kernel_oneplus_sm8150

arch/sh/boards/mach-ecovec24/setup.c

+15 −11

Original line number	Original line	Diff line number	Diff line
	@@ -710,8 +710,6 @@ static struct clk_ops fsimck_clk_ops = {
	};		};

	static struct clk fsimckb_clk = {		static struct clk fsimckb_clk = {
	.name = "fsimckb_clk",
	.id = -1,
	.ops = &fsimck_clk_ops,		.ops = &fsimck_clk_ops,
	.enable_reg = (void __iomem *)FCLKBCR,		.enable_reg = (void __iomem *)FCLKBCR,
	.rate = 0, /* unknown */		.rate = 0, /* unknown */
	@@ -1138,16 +1136,20 @@ static int __init arch_setup(void)

	/* set SPU2 clock to 83.4 MHz */		/* set SPU2 clock to 83.4 MHz */
	clk = clk_get(NULL, "spu_clk");		clk = clk_get(NULL, "spu_clk");
			if (clk) {
	clk_set_rate(clk, clk_round_rate(clk, 83333333));		clk_set_rate(clk, clk_round_rate(clk, 83333333));
	clk_put(clk);		clk_put(clk);
			}

	/* change parent of FSI B */		/* change parent of FSI B */
	clk = clk_get(NULL, "fsib_clk");		clk = clk_get(NULL, "fsib_clk");
			if (clk) {
	clk_register(&fsimckb_clk);		clk_register(&fsimckb_clk);
	clk_set_parent(clk, &fsimckb_clk);		clk_set_parent(clk, &fsimckb_clk);
	clk_set_rate(clk, 11000);		clk_set_rate(clk, 11000);
	clk_set_rate(&fsimckb_clk, 11000);		clk_set_rate(&fsimckb_clk, 11000);
	clk_put(clk);		clk_put(clk);
			}

	gpio_request(GPIO_PTU0, NULL);		gpio_request(GPIO_PTU0, NULL);
	gpio_direction_output(GPIO_PTU0, 0);		gpio_direction_output(GPIO_PTU0, 0);
	@@ -1159,8 +1161,10 @@ static int __init arch_setup(void)

	/* set VPU clock to 166 MHz */		/* set VPU clock to 166 MHz */
	clk = clk_get(NULL, "vpu_clk");		clk = clk_get(NULL, "vpu_clk");
			if (clk) {
	clk_set_rate(clk, clk_round_rate(clk, 166000000));		clk_set_rate(clk, clk_round_rate(clk, 166000000));
	clk_put(clk);		clk_put(clk);
			}

	/* enable IrDA */		/* enable IrDA */
	gpio_request(GPIO_FN_IRDA_OUT, NULL);		gpio_request(GPIO_FN_IRDA_OUT, NULL);

arch/sh/boards/mach-highlander/setup.c

+11 −1

Original line number	Original line	Diff line number	Diff line
	@@ -14,6 +14,7 @@
	* for more details.		* for more details.
	*/		*/
	#include <linux/init.h>		#include <linux/init.h>
			#include <linux/io.h>
	#include <linux/platform_device.h>		#include <linux/platform_device.h>
	#include <linux/ata_platform.h>		#include <linux/ata_platform.h>
	#include <linux/types.h>		#include <linux/types.h>
	@@ -26,6 +27,7 @@
	#include <net/ax88796.h>		#include <net/ax88796.h>
	#include <asm/machvec.h>		#include <asm/machvec.h>
	#include <mach/highlander.h>		#include <mach/highlander.h>
			#include <asm/clkdev.h>
	#include <asm/clock.h>		#include <asm/clock.h>
	#include <asm/heartbeat.h>		#include <asm/heartbeat.h>
	#include <asm/io.h>		#include <asm/io.h>
	@@ -326,7 +328,6 @@ static struct clk_ops ivdr_clk_ops = {
	};		};

	static struct clk ivdr_clk = {		static struct clk ivdr_clk = {
	.name = "ivdr_clk",
	.ops = &ivdr_clk_ops,		.ops = &ivdr_clk_ops,
	};		};

	@@ -334,6 +335,13 @@ static struct clk *r7780rp_clocks[] = {
	&ivdr_clk,		&ivdr_clk,
	};		};

			#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }

			static struct clk_lookup lookups[] = {
			/* main clocks */
			CLKDEV_CON_ID("ivdr_clk", &ivdr_clk),
			};

	static void r7780rp_power_off(void)		static void r7780rp_power_off(void)
	{		{
	if (mach_is_r7780mp() \|\| mach_is_r7785rp())		if (mach_is_r7780mp() \|\| mach_is_r7785rp())
	@@ -370,6 +378,8 @@ static void __init highlander_setup(char **cmdline_p)
	clk_enable(clk);		clk_enable(clk);
	}		}

			clkdev_add_table(lookups, ARRAY_SIZE(lookups));

	__raw_writew(0x0000, PA_OBLED); /* Clear LED. */		__raw_writew(0x0000, PA_OBLED); /* Clear LED. */

	if (mach_is_r7780rp())		if (mach_is_r7780rp())

arch/sh/boards/mach-se/7724/setup.c

+11 −9

Original line number	Original line	Diff line number	Diff line
	@@ -276,8 +276,6 @@ static struct clk_ops fsimck_clk_ops = {
	};		};

	static struct clk fsimcka_clk = {		static struct clk fsimcka_clk = {
	.name = "fsimcka_clk",
	.id = -1,
	.ops = &fsimck_clk_ops,		.ops = &fsimck_clk_ops,
	.enable_reg = (void __iomem *)FCLKACR,		.enable_reg = (void __iomem *)FCLKACR,
	.rate = 0, /* unknown */		.rate = 0, /* unknown */
	@@ -771,16 +769,20 @@ static int __init devices_setup(void)

	/* set SPU2 clock to 83.4 MHz */		/* set SPU2 clock to 83.4 MHz */
	clk = clk_get(NULL, "spu_clk");		clk = clk_get(NULL, "spu_clk");
			if (clk) {
	clk_set_rate(clk, clk_round_rate(clk, 83333333));		clk_set_rate(clk, clk_round_rate(clk, 83333333));
	clk_put(clk);		clk_put(clk);
			}

	/* change parent of FSI A */		/* change parent of FSI A */
	clk = clk_get(NULL, "fsia_clk");		clk = clk_get(NULL, "fsia_clk");
			if (clk) {
	clk_register(&fsimcka_clk);		clk_register(&fsimcka_clk);
	clk_set_parent(clk, &fsimcka_clk);		clk_set_parent(clk, &fsimcka_clk);
	clk_set_rate(clk, 11000);		clk_set_rate(clk, 11000);
	clk_set_rate(&fsimcka_clk, 11000);		clk_set_rate(&fsimcka_clk, 11000);
	clk_put(clk);		clk_put(clk);
			}

	/* SDHI0 connected to cn7 */		/* SDHI0 connected to cn7 */
	gpio_request(GPIO_FN_SDHI0CD, NULL);		gpio_request(GPIO_FN_SDHI0CD, NULL);

arch/sh/include/asm/clock.h

+3 −150

Original line number	Original line	Diff line number	Diff line
	#ifndef __ASM_SH_CLOCK_H		#ifndef __ASM_SH_CLOCK_H
	#define __ASM_SH_CLOCK_H		#define __ASM_SH_CLOCK_H

	#include <linux/list.h>		#include <linux/sh_clk.h>
	#include <linux/seq_file.h>
	#include <linux/cpufreq.h>
	#include <linux/clk.h>
	#include <linux/err.h>

	struct clk;

	struct clk_ops {
	void (init)(struct clk clk);
	int (enable)(struct clk clk);
	void (disable)(struct clk clk);
	unsigned long (recalc)(struct clk clk);
	int (set_rate)(struct clk clk, unsigned long rate, int algo_id);
	int (set_parent)(struct clk clk, struct clk *parent);
	long (round_rate)(struct clk clk, unsigned long rate);
	};

	struct clk {
	struct list_head node;
	const char *name;
	int id;
	struct module *owner;

	struct clk *parent;
	struct clk_ops *ops;

	struct list_head children;
	struct list_head sibling; /* node for children */

	int usecount;

	unsigned long rate;
	unsigned long flags;

	void __iomem *enable_reg;
	unsigned int enable_bit;

	unsigned long arch_flags;
	void *priv;
	struct dentry *dentry;
	struct cpufreq_frequency_table *freq_table;
	};

	#define CLK_ENABLE_ON_INIT (1 << 0)

	/* Should be defined by processor-specific code */		/* Should be defined by processor-specific code */
	void __deprecated arch_init_clk_ops(struct clk_ops **, int type);		void __deprecated arch_init_clk_ops(struct clk_ops **, int type);
	int __init arch_clk_init(void);		int __init arch_clk_init(void);

	/* arch/sh/kernel/cpu/clock.c */
	int clk_init(void);
	unsigned long followparent_recalc(struct clk *);
	void recalculate_root_clocks(void);
	void propagate_rate(struct clk *);
	int clk_reparent(struct clk child, struct clk parent);
	int clk_register(struct clk *);
	void clk_unregister(struct clk *);

	/* arch/sh/kernel/cpu/clock-cpg.c */		/* arch/sh/kernel/cpu/clock-cpg.c */
	int __init __deprecated cpg_clk_init(void);		int __init __deprecated cpg_clk_init(void);

	/* the exported API, in addition to clk_set_rate */		/* arch/sh/kernel/cpu/clock.c */
	/**		int clk_init(void);
	* clk_set_rate_ex - set the clock rate for a clock source, with additional parameter
	* @clk: clock source
	* @rate: desired clock rate in Hz
	* @algo_id: algorithm id to be passed down to ops->set_rate
	*
	* Returns success (0) or negative errno.
	*/
	int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id);

	enum clk_sh_algo_id {
	NO_CHANGE = 0,

	IUS_N1_N1,
	IUS_322,
	IUS_522,
	IUS_N11,

	SB_N1,

	SB3_N1,
	SB3_32,
	SB3_43,
	SB3_54,

	BP_N1,

	IP_N1,
	};

	struct clk_div_mult_table {
	unsigned int *divisors;
	unsigned int nr_divisors;
	unsigned int *multipliers;
	unsigned int nr_multipliers;
	};

	struct cpufreq_frequency_table;
	void clk_rate_table_build(struct clk *clk,
	struct cpufreq_frequency_table *freq_table,
	int nr_freqs,
	struct clk_div_mult_table *src_table,
	unsigned long *bitmap);

	long clk_rate_table_round(struct clk *clk,
	struct cpufreq_frequency_table *freq_table,
	unsigned long rate);

	int clk_rate_table_find(struct clk *clk,
	struct cpufreq_frequency_table *freq_table,
	unsigned long rate);

	#define SH_CLK_MSTP32(_name, _id, _parent, _enable_reg, \
	_enable_bit, _flags) \
	{ \
	.name = _name, \
	.id = _id, \
	.parent = _parent, \
	.enable_reg = (void __iomem *)_enable_reg, \
	.enable_bit = _enable_bit, \
	.flags = _flags, \
	}

	int sh_clk_mstp32_register(struct clk *clks, int nr);

	#define SH_CLK_DIV4(_name, _parent, _reg, _shift, _div_bitmap, _flags) \
	{ \
	.name = _name, \
	.parent = _parent, \
	.enable_reg = (void __iomem *)_reg, \
	.enable_bit = _shift, \
	.arch_flags = _div_bitmap, \
	.flags = _flags, \
	}

	struct clk_div4_table {
	struct clk_div_mult_table *div_mult_table;
	void (kick)(struct clk clk);
	};

	int sh_clk_div4_register(struct clk *clks, int nr,
	struct clk_div4_table *table);
	int sh_clk_div4_enable_register(struct clk *clks, int nr,
	struct clk_div4_table *table);
	int sh_clk_div4_reparent_register(struct clk *clks, int nr,
	struct clk_div4_table *table);

	#define SH_CLK_DIV6(_parent, _reg, _flags) \
	{ \
	.parent = _parent, \
	.enable_reg = (void __iomem *)_reg, \
	.flags = _flags, \
	}

	int sh_clk_div6_register(struct clk *clks, int nr);

	#endif /* __ASM_SH_CLOCK_H */		#endif /* __ASM_SH_CLOCK_H */

arch/sh/kernel/cpu/Makefile

+1 −1

Original line number	Original line	Diff line number	Diff line
	@@ -16,7 +16,7 @@ obj-$(CONFIG_ARCH_SHMOBILE) += shmobile/
	# Common interfaces.		# Common interfaces.

	obj-$(CONFIG_SH_ADC) += adc.o		obj-$(CONFIG_SH_ADC) += adc.o
	obj-$(CONFIG_SH_CLK_CPG) += clock-cpg.o		obj-$(CONFIG_SH_CLK_CPG_LEGACY) += clock-cpg.o
	obj-$(CONFIG_SH_FPU) += fpu.o		obj-$(CONFIG_SH_FPU) += fpu.o
	obj-$(CONFIG_SH_FPU_EMU) += fpu.o		obj-$(CONFIG_SH_FPU_EMU) += fpu.o