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Commit c4d17b81 authored by Rex Zhu's avatar Rex Zhu Committed by Alex Deucher
Browse files

drm/amdgpu: always initialize gfx pg for gfx_v8.0. 



v2: always init gfx pg for asics that can support.

Signed-off-by: default avatarRex Zhu <Rex.Zhu@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 98fccc78

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

+32 −39
Original line number Diff line number Diff line
@@ -3970,9 +3970,6 @@ static void gfx_v8_0_init_power_gating(struct amdgpu_device *adev) 
{

	uint32_t data;



	if (adev->pg_flags & (AMD_PG_SUPPORT_GFX_PG |

			      AMD_PG_SUPPORT_GFX_SMG |

			      AMD_PG_SUPPORT_GFX_DMG)) {

	WREG32_FIELD(CP_RB_WPTR_POLL_CNTL, IDLE_POLL_COUNT, 0x60);



	data = REG_SET_FIELD(0, RLC_PG_DELAY, POWER_UP_DELAY, 0x10);
@@ -3983,7 +3980,7 @@ static void gfx_v8_0_init_power_gating(struct amdgpu_device *adev) 


	WREG32_FIELD(RLC_PG_DELAY_2, SERDES_CMD_DELAY, 0x3);

	WREG32_FIELD(RLC_AUTO_PG_CTRL, GRBM_REG_SAVE_GFX_IDLE_THRESHOLD, 0x55f0);

	}



}



static void cz_enable_sck_slow_down_on_power_up(struct amdgpu_device *adev,
@@ -4005,18 +4002,11 @@ static void cz_enable_cp_power_gating(struct amdgpu_device *adev, bool enable) 


static void gfx_v8_0_init_pg(struct amdgpu_device *adev)

{

	if (adev->pg_flags & (AMD_PG_SUPPORT_GFX_PG |

			      AMD_PG_SUPPORT_GFX_SMG |

			      AMD_PG_SUPPORT_GFX_DMG |

			      AMD_PG_SUPPORT_CP |

			      AMD_PG_SUPPORT_GDS |

			      AMD_PG_SUPPORT_RLC_SMU_HS)) {

	if ((adev->asic_type == CHIP_CARRIZO) ||

	    (adev->asic_type == CHIP_STONEY)) {

		gfx_v8_0_init_csb(adev);

		gfx_v8_0_init_save_restore_list(adev);

		gfx_v8_0_enable_save_restore_machine(adev);



		if ((adev->asic_type == CHIP_CARRIZO) ||

		    (adev->asic_type == CHIP_STONEY)) {

		WREG32(mmRLC_JUMP_TABLE_RESTORE, adev->gfx.rlc.cp_table_gpu_addr >> 8);

		gfx_v8_0_init_power_gating(adev);

		WREG32(mmRLC_PG_ALWAYS_ON_CU_MASK, adev->gfx.cu_info.ao_cu_mask);
@@ -4032,9 +4022,12 @@ static void gfx_v8_0_init_pg(struct amdgpu_device *adev) 
		else

			cz_enable_cp_power_gating(adev, false);

	} else if (adev->asic_type == CHIP_POLARIS11) {

		gfx_v8_0_init_csb(adev);

		gfx_v8_0_init_save_restore_list(adev);

		gfx_v8_0_enable_save_restore_machine(adev);

		gfx_v8_0_init_power_gating(adev);

	}

	}



}



static void gfx_v8_0_rlc_stop(struct amdgpu_device *adev)