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Commit c45bd374 authored by Tony Lindgren's avatar Tony Lindgren
Browse files

omap: Use CONFIG_SMP for test_for_ipi and test_for_ltirq



Otherwise we get the following error when enabling CONFIG_SMP
for omap3_defconfig:

arch/arm/kernel/entry-armv.S: Assembler messages:
arch/arm/kernel/entry-armv.S:48: Error: bad instruction `test_for_ipi r0,r6,r5,lr'
arch/arm/kernel/entry-armv.S:48: Error: bad instruction `test_for_ltirq r0,r6,r5,lr'
arch/arm/kernel/entry-armv.S:48: Error: bad instruction `test_for_ipi r0,r6,r5,lr'
arch/arm/kernel/entry-armv.S:48: Error: bad instruction `test_for_ltirq r0,r6,r5,lr'

Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
Acked-by: default avatarSantosh Shilimkar <santosh.shilimkar@ti.com>
parent a4192d32
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+4 −2
Original line number Original line Diff line number Diff line
@@ -177,7 +177,10 @@ omap_irq_base: .word 0
		cmpne   \irqnr, \tmp
		cmpne   \irqnr, \tmp
		cmpcs   \irqnr, \irqnr
		cmpcs   \irqnr, \irqnr
		.endm
		.endm
#endif
#endif	/* MULTI_OMAP2 */


#ifdef CONFIG_SMP
		/* We assume that irqstat (the raw value of the IRQ acknowledge
		/* We assume that irqstat (the raw value of the IRQ acknowledge
		 * register) is preserved from the macro above.
		 * register) is preserved from the macro above.
		 * If there is an IPI, we immediately signal end of interrupt
		 * If there is an IPI, we immediately signal end of interrupt
@@ -205,8 +208,7 @@ omap_irq_base: .word 0
		streq	\irqstat, [\base, #GIC_CPU_EOI]
		streq	\irqstat, [\base, #GIC_CPU_EOI]
		cmp	\tmp, #0
		cmp	\tmp, #0
		.endm
		.endm
#endif
#endif	/* CONFIG_SMP */
#endif	/* MULTI_OMAP2 */


		.macro	irq_prio_table
		.macro	irq_prio_table
		.endm
		.endm